WO2001090958A1 - Method and system for logical analysis of a network representation - Google Patents

Method and system for logical analysis of a network representation Download PDF

Info

Publication number
WO2001090958A1
WO2001090958A1 PCT/DK2001/000359 DK0100359W WO0190958A1 WO 2001090958 A1 WO2001090958 A1 WO 2001090958A1 DK 0100359 W DK0100359 W DK 0100359W WO 0190958 A1 WO0190958 A1 WO 0190958A1
Authority
WO
WIPO (PCT)
Prior art keywords
graph
representation
logical
network
route
Prior art date
Application number
PCT/DK2001/000359
Other languages
French (fr)
Inventor
Bo Grave
Preben Rohde Larsen
Original Assignee
Atkins Danmark A/S
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atkins Danmark A/S filed Critical Atkins Danmark A/S
Priority to AU2001262064A priority Critical patent/AU2001262064A1/en
Publication of WO2001090958A1 publication Critical patent/WO2001090958A1/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01CMEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C21/00Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00
    • G01C21/26Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00 specially adapted for navigation in a road network
    • G01C21/34Route searching; Route guidance
    • G01C21/3446Details of route searching algorithms, e.g. Dijkstra, A*, arc-flags, using precalculated routes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/10Geometric CAD
    • G06F30/18Network design, e.g. design based on topological or interconnect aspects of utility systems, piping, heating ventilation air conditioning [HVAC] or cabling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00Details relating to CAD techniques
    • G06F2111/12Symbolic schematics

Definitions

  • Such matrix of precedence is thus its own transposed for non-oriented graphs.
  • An alternative notation designates connected nodes as a list of pairs. For instance: (1,2) (1,4) (3,4) may designate a graph of four nodes, wherein node 1 is connected to 2 and 4, and node 3 is connected to 4.
  • the invention may use an oriented graph, if more convenient, wherein the logical equations posed are merely to be formulated in accordance therewith.
  • One example of this could for instance be an electrical network with diodes or the like.
  • each edge is provided with two separate graph connecting points at each end associated with the node to which the edge is connected;
  • said logical premises for said graph representation comprise
  • This invention also relates to a computer system comprising means for executing a programme, wherein the pro- gramme, when executed, causes the computer to perform the method according to the invention.
  • Figure 4 shows a graph representation of the insulated switches ( Figure 3) ;
  • Figure 6 shows a node with three connecting points
  • FIG. 9 shows a flowchart for one embodiment of the invention.
  • Figure 10 shows one embodiment for providing the graph representation
  • Figure 4 illustrates a graph representation of the insu- lated contacts (Figure 3) . Shown is a graph corresponding to the network in Figure 3 that consists of two terminals
  • FIGS 1 and 2, and 6 and 7 describe the electrical con- nection between terminals A and B and the remaining network. It is to be noted that this exemplary graph has no orientation.
  • Each edge K describes a switch or an electrical connection, wherein the route can take its course in both directions.
  • a node has a final number of connecting points corresponding to the number of edges that are connected to the node.
  • nodes with three connecting points have been used, but notes with two, four or five or more connecting points can readily be used.
  • Figure 6 shows a node with three connecting points .
  • Kirchoff's current law states that the current to/from a node must be zero. Analogously with this, the requirement that what comes in must also come out can also be represented by:
  • fp designates all the connecting points associated with the same node.
  • a considerable advantage obtained by use of this tool consists in that ia integer values can be handled on an equal footing with logical variables so as to enable representation of eg the connecting points with numerical variables that can for instance assume the value -1, 0 or +1 as listed in the above table.
  • a quantifier can be introduced that counts how many 'in'- variables and 'out ' -variables, respectively, that are true to ensure that the amount/number of 'goings-in' to the system is the same as the amount/number of ' goings- out' of the system. At the same time it must be specified that 'in' and 'out' for the same variable cannot be true at the same time.
  • lines 1 through 6 specify a variable type fp that consists of to logical variables, in and out; lines 7 through 10 establish the variables fpi , fp 2 and fp 3 ; lines 12 through 14 specify that the route cannot both go in and out at the same time; line 15 specifies that just as much must go in as goes out of the node.
  • This table is a 'one-to-one' mapping (ie an alternative and equivalent specification) of the table for the nu- merical representation of the admissible combinations.
  • the relation that describes whether the edge is used can be described either as the relation between K and eg fpi, since the one connecting point cannot be used without the other.
  • lines 7 through 10 set up the variables fpl, fp2 and K; lines 12 and 13 specify that the route cannot both go in and out of the same connecting point simultaneously; lines 14 and 15 specify that what goes in by fpl goes out by fp2, and vice versa; line 16 specifies that K is true if and only if the route goes in or out by fpl.
  • the component as such has only one connecting point to the remaining graph, through which it is communicated whether the route leads to or away from this external terminal. This means that the property set for the relevant terminal must be transferred to the connecting point such that - when something is to start from the terminal - the connecting point must be set to the route leaving the terminal, and vice versa if it is desired that so e- thing should end in the terminal.
  • Line 16 specifies that the route cannot both go in and out of the same connecting point simultaneously
  • the below table states the relation between the terminal Tl and the one connecting point fp x .
  • Each component can be specified accurately.
  • the edge K s that is situated between the connecting points fpi and fp 2 can be specified as
  • node PI can be specified as:
  • K 6 and K 7 do not represent a switch, but merely the connection between the terminal and the first node. There- fore these two edges can be removed. Also note that K 6 and K 7 are both true for all possible solutions where there is a connection between A and B, which is in correspondence with the graph of Figure 4.
  • Table 1 The complete system table
  • Rows 1 and 5 are identical, ie they represent the same path between A and B, and therefore one of the solutions can be removed. The same applies to 2 and 6, 3 and 7 as well as 4 and 8. This yields the four possible paths between A and B.
  • the first row shows that a possible path between A and B is through the edges Ki and K 4 .
  • Ie Pathl is true when K x and K 4 are connected/true . In a corresponding manner the three other rows can be translated.
  • Path3 K 3 and K 5 ;
  • One example of a use is a transport network with a number of possible mounting and dismounting stations.
  • An external terminal is added for each possible mounting and dis- mounting station.
  • Two external terminals can be desig ⁇ nated as Start and End destination, respectively, follow ⁇ ing the analysis is able to derive all possible routes between the Start and End destinations, such that all the ways in which it is possible to go from Start to End can be determined. This can be used eg in a route planning tool.
  • the edges can also be associated with a number of properties, such as price, distance, time, etc. whereby a subsequent analysis would be able to sum up eg the total time consumption, price, distance to go from Start to End.
  • FIG. 9 shows a flowchart for one embodiment of the invention.
  • step (901) the procedure is initiated.
  • step (902) relevant information/data are read, eg from a database, one or more files, a network, etc, that in some way or other define the network to be analysed/processed.
  • step (903) a graph representation is provided of the read network representation by scanning/parsing the read data or the database/file as such. This provision is carried out in accordance with a given syntax for a logical analysis tool/an inference machine. This corresponds eg to the wording given in connection with Figure 8.
  • the network representation is broken down by the construction/provision of the graph representation in a final number of smaller, well-defined components, as will be explained in further detail in connection with Figure 10, wherein a more detailed embodiment of the step (903) is shown and explained in connection therewith.
  • step (904) the logical premises for each basic element in the graph representation are provided/laid down.
  • the basic elements can be eg one or more edges K, graph connecting points fp, external terminals and nodes.
  • Subject to further specification can be the logical premises that are to be complied with to solve a given prob- lem, such as determination of all routes in the graph and thus also the network representation.
  • step (904) is shown in Fig- ure 11 and will be explained in connection therewith.
  • step (905) the logical premises in a logical analysis tool are solved to determine the solution space for ' the logical rules/premises that have been formed.
  • this process can be automated completely merely by determining the logical premises once and for all. Then only input data are needed from a database, file, etc, to derive the solutions to a problem/an analysis that relates to a network structure.
  • a further subsequent processing can be performed on the result by imposing further conditions/criteria, eg with a view to analysing the result in order to thereby be able to deduct and/or present various information, eg to a user, depending entirely on which problem is of interest.
  • Figure 10 shows one embodiment for the provision of the graph representation. Shown is a detailed flowchart for one embodiment of the step (903) in Figure 9.
  • step (102) the graph connecting points are provided. This element is introduced to enable chaining of other elements (edges, nodes, and external terminals) .
  • step (103) the read data are scanned to identify connections in the network representation. They are converted to edges in the graph representation.
  • the conver- sion depends on the syntax or notation used by the employed analysis tool. For instance, the notation given in connection with the description of Figures 4-8 can be used, whereby a connection is converted to an edge designated by Arc (Ki , p , fps) r wherein also the graph con- necting points associated with the respective edge are given. Alternatively the edge could be listed in table form as illustrated above.
  • step (105) it is determined whether zero, two or more external terminals are to be provided or not, as this depends on the actual problem to be solved. For instance, it should say two or zero terminals if all routes between two points are to be determined or all possible loops in the network are to be determined, respectively. If no external terminals are to be mentioned, step (107) is the closing step, and otherwise step (106) is performed wherein the external terminals are provided in the graph representation.
  • the external terminals can be designated ExTerm (A, fp_) ; or be in table form.
  • step (107) closing is performed in step (107) .
  • Step (904) in Figure 9 is performed.
  • Steps (102) and (106) correspond to the course illus- trated in connection with Figures 2 through 8.
  • steps (102), (103), (104) and (106) can be performed parallel or in other sequence than the one shown in the figure.
  • Figure 11 shows one embodiment for the provision of one or more logical premises. Shown is a detailed flowchart for one embodiment of the step (904) in Figure 9.
  • step (112) the logical premises/rule (s) for each graph connecting point is/are provided. These premises define 'a route in' and 'a route out' or 'no route', respectively, for the given graph connecting point.
  • These three states can be realised eg by two logical variables or a numerical variable as stated above in connection with Figure 5.
  • the two logical variables could eg be one that describes whether anything goes 'in' and one that describes whether anything goes 'out' of the relevant connecting point.
  • the numerical variable must merely have a unique numerical value for each of the three states.
  • step (113) the relevant logical premises for each note is/are provided.
  • One such premise must determine that what comes into the given node must also come out. This can be represented by the sum of the numerical variables for all graph-connecting points that are in relation/connected to the given node having to be zero. This is also explained in connection with Figure 6.
  • edge is used by a route. This must be indicated on the edge so as to make it possible to ascertain visually whether the edge was used in the route in question. Therefore a Boolean variable K must be introduced that describes whether the edge has been used or not. If merely one of the connecting points has been used the edge has also been used, and since the one connecting point cannot be used without the other, this premise can be defined as the relation between one of the connecting points and K, such that K is true when something either goes in or out of the connecting point, and false when the connecting point is not used.
  • FIG. 12 shows a block diagram of a system according to one embodiment of the invention. Shown in the figure are processing/calculating means (122) that can be one or more random and sufficient CPUs.
  • the processing means (122) are connected to reading/input means (121) that are responsible for receiving information from eg a user, a hard disk, etc.
  • the processing means (122) are also connected to one or more external and/or internal storages/memories (123) for storing and reading results, variables, etc.
  • the storages/memory (123) can also comprise the data that define the network representation, such as eg a CAD file.
  • the storage/memory (123) can be of any type of RAM, hard disk, etc. and a combination is preferred.
  • the processing means (122) are further connected to presentation means (124), such as eg a display for the pres- entation/communication of information, options, results, etc. to a user.
  • presentation means such as eg a display for the pres- entation/communication of information, options, results, etc. to a user.
  • the processing means (122) are responsible for executing a program that enables the method.

Abstract

This invention relates to a method for logical analysis of at least a part of a network, wherein the method comprises reading of a network representation of at least a part of the network, and provision of a graph representation on the basis of at least a part of the network representation, wherein the method further comprises provision of one or more logical premises on the basis of said graph representation, and solving of said logical premises by means of a logical analysis tool/an inference machine and thereby deriving all possible solutions that meet one or more given criteria. Hereby a method is provided that can automate an expedient and efficient analysis of a network, e.g. with a view to determining all possible routes between two given points and/or all possible loops in a network. Then the invention also relates to a computer system comprising means for executing a programme, wherein the programme, when it is executed, causes the computer system to perform the method, and a computer-readable medium that comprises a programme written thereon, wherein the programme, when it is executed, causes a computer to perform the method according to the invention.

Description

Method and System for logical analysis of a network representation
This invention relates to a method for logical analysis of at least a part of a network, wherein the method comprises reading of a network representation of at least a part of the network, and provision of a graph representation on the basis of at least a part of the network representation.
Besides, the invention relates to a system for logical analysis of a least a part of a network.
Also, the invention relates to a computer system for ex- ercising the method and a computer-readable medium comprising a programme that can be caused to execute the method on a computer.
This invention relates to analysis of a given network in order to thereby extract useful information about the network in a particularly convenient manner, as will be clear from the following.
Examples of networks that can advantageously be used in connection with this invention include ia systems such as electrical networks, power supply networks, pipe connections, eg on an oil platform, relay systems, such as those used in connection with safety equipment for railways, nuclear power plants, etc, transport systems or - overall - systems that can be represented by a graph.
The term graph" is used herein to designate a schematic representation of a network, consisting of edges and nodes . Preferably, the analysis may comprise the provision of all routes between two points in a given graph. The term * route" is used herein to designate a path given at connected edges and nodes in a graph.
Alternatively all loops in a given graph can be determined, and the term loop" is used herein to designate a route that begins and ends in the same node.
For instance, an electrical network/system can be decomposed into a final number of well-defined electrical components, such as resistors, coils, condensators, etc, that are connected through electrical wiring, such as eg print paths, cords, etc.
In order to represent such, often very complex, systems/networks, a graph is often used that consists of nodes that are mutually connected by a number of lines/edges .
Prior art systems/methods that describe and/or process graphs are typically based on matrices of precedence, lists or the like descriptive material.
A matrix of precedence describes which nodes are connected and which are not connected, respectively, by inserting a symbol, number or the like, such as eg "1" in a matrix element that represents a connection between two nodes, and eg λ0" if there is no connection. For in- stance, l" in the matrix element 2,1 (row, column) may mean that node 2 is connected to 1.
Such matrix of precedence is thus its own transposed for non-oriented graphs. An alternative notation designates connected nodes as a list of pairs. For instance: (1,2) (1,4) (3,4) may designate a graph of four nodes, wherein node 1 is connected to 2 and 4, and node 3 is connected to 4.
Such notations can also handle weightings between the connections, eg by inserting the value of the weighting into the matrix, such that 5 inserted in the matrix element 2,3 may mean that node 2 is connected to 3 and the connection has the weighting 5, whereas, as regards the pairs, a further element indicating the weighting can merely be introduced into the parenthesis.
Additionally, the orientation of the connections can also be represented, eg by making the sequence of the numbers within the parenthesis significant (1,2) ≠ (2,1) or by introducing sign digits into the matrix of precedence.
However, such representations are not particular conven- ient for the processing of certain problems/analyses or for graphs that represent very large systems.
For instance, in order to determine all the routes by means of matrices of precedence or lists, it is necessary to perform many searches through the graph in order to be able, at all times, to detect which possible further route segments are available. This would typically cause the search routine to end up in "dead ends", which would result in waste of work and process time. Too protracted process times would yield unacceptable response times if, for instance, the analysis is to be performed in connection with an Internet application or the like online systems. A further problem arises in connection with non-oriented graphs, since the cyclical elements would also require time and processing resources.
Typically, not all routes would be saved either, but - to the contrary - a calculation would be performed each time.
US patent disclosure No 5,063,520 teaches a method for graphical analysis of a network based on a graph representation that comprises nodes and edges representing connection points and connections, respectively, in the given network. A given flow, path, connection, etc, in the network in a given state is visualised, wherein the method is able to calculate the effect of a change of state for one or more nodes, such that the changed flow, the changed path, etc., between for instance points A and B can be provided. The method starts in a point of departure, eg A, and checks which adjoining neighbouring points allow passage of a flow, a path, etc (ie are on) . Then the procedure is repeated for each of the neighbouring points that allows passage of a flow, a path, etc., in order to determine those neighbouring points of the neighbouring points that allow a flow, a path, etc. This procedure is repeated until the entire network has been gone over. From a calculation point of view, this method is very complex and demanding, since the calculations for a point of departure presuppose calculations for each neighbouring point, and each neighbouring point to each neighbouring point, etc.
Thus it is an object of this invention to provide a method that enables/provides efficient and expedient analysis of even complex and very comprehensive sys- tems/circuits . It is a further object of the invention to provide a method that enables full knowledge of all solutions to a set of given, logical equations/conditions.
It is a further object to enable the creation of a logical representation of a network/graph that represents the properties that it is desired to analyse.
This is achieved by the method mentioned in the opening paragraphs that further comprises
• provision of one or more logical premises on the basis of said graph representation; and
• solving of said logical premises by means of a tool for logical analysis/an inference machine and thereby deducting all possible solutions that meet one or more given criteria.
Hereby a method is provided that is able to handle analy- sis of quite complex networks/systems on the basis of a graph representation.
Besides, it is possible to provide a graph representation by means of relatively few and simple basic elements (such as edges, nodes, external terminals) that combine with the reading of the network representation to enable an automated analysis of a network/a network representation. Besides an unequivocal logical representation is obtained by means of logical premises, wherein all possi- ble solutions to a given problemin accordance with one or more given criteria are derived by one calculation.
The logical premises also mean that it is not necessary to perform searches through the graph representation. Thus, the calculation time necessary to derive the result of the analysis is reduced considerably. In particular for very large networks.
Several systems are available for handling and solving a set of logical bindings/equations. Examples include the Array Technology's Build tool, the inference machine in Baan' s configurator.
In a preferred embodiment said on or more given criterion/criteria relate (s) to one or more of the following:
• determination of all possible routes in at least a part of the network representation; and • determination of all loops in at least a part of the network representation.
According to' a preferred embodiment said graph representation comprises one or more of:
• two or more nodes;
• one or more edges;
• one or more graph connecting points;
• zero, two or more external terminals.
According to one embodiment the graph representation is non-oriented.
Alternatively the invention may use an oriented graph, if more convenient, wherein the logical equations posed are merely to be formulated in accordance therewith. One example of this could for instance be an electrical network with diodes or the like.
According to a preferred embodiment said graph representation is provided in that • each connection in said at least a part of the network representation yields an edge in the graph representation; • each connecting point between at least two connections in said at least a part of the network representation yields a node in the graph representation;
• each edge is provided with two separate graph connecting points at each end associated with the node to which the edge is connected; and
• zero, two or more external terminals.
Each graph connecting point is introduced in order to enable description/handling of the transition between edges and nodes in the graph in a logical analysis tool/an inference machine .
According to a further preferred embodiment, said logical premises for said graph representation comprise
• one or more logical premises for each graph connecting point, defining that a route goes in or goes out or no route, respectively, in the given graph connecting point; • one or more logical premises for each node that maximally define (s) a route in and a route out simultaneously, or no route.
According to one embodiment said logical premises for said graph representation comprise
• one or more logical premises for each edge connected to two nodes, defining maximally a route in and a route out simultaneously, or no route. According to a preferred embodiment said logical premises for said graph representation comprise
• one or more logical premises for each external terminal given either by a given route starting, ending or neither starts nor ends in the external terminal.
According to a preferred embodiment said network representation represents one or more of the following:
• power supply networks;
• electrical networks;
• relay systems;
• pipe systems; • a transport system, such as railways, etc., a travel plan; electrical supply nets; and other electronical networks.
It is a further object of the invention to provide a method that enables determination of all possible paths between two given points in a network/a network representation.
This can be achieved, eg by connecting an external terminal to each of the two given points between which it is desired to determine all routes in the graph/network, and setting up/defining the one external terminal to vStart' and the other external terminal to vEnd' , the logical analysis tool being hereby able to derive all authorised combinations for the edges that apply to the relevant situation. The further details of this operation will be specified in connection with the figures.
It is a further option to connect several external terminals (eg to all points) , where two points can subse- quently be selected as xStart' and λEnd' , respectively, and the remainder be set to neither λStart' nor xEnd' .
It is a further object of the invention to provide a method that enables determination of all cells/loops in a network/a network representation.
This can be accomplished for instance by setting all external terminals to be neither λStart' nor λEnd' , whereby it is possible to enquire which combinations of edges that are comprised by the various loops.
This invention also relates to a computer system comprising means for executing a programme, wherein the pro- gramme, when executed, causes the computer to perform the method according to the invention.
The term λcomputer system' as used herein designates ia a system that comprises one or more processor means, such as eg a CPU or the like and that can be programmed at some given point in time or other, thereby causing the performance/execution of a set of instructions/commands to occur, such as eg a system for logical analysis of at least a part of a network comprising construction of a graph representation of at least a part of the network, or a general computer system, such as a PC, laptop, palmtop, or a system comprising at least a unit that features a micro-controller configured for performing/executing a programme (either in hardware and/or in software) .
The invention also relates to a computer-readable medium that comprises a programme written thereon, wherein the programme, when executed, causes the computer to perform the method/the invention. The computer-readable medium can be eg a CD-ROM, a magnetic disk, a ROM circuit, a network connection or, in general, any other medium that is able to provide a computer system with information on how to perform/execute instructions/commands.
It is a further object of the invention to provide a system and embodiments thereof having the same advantages for the same reasons as the above-mentioned method and its embodiments.
This is achieved by a system and its embodiments as described in the following.
A system for logical analysis of at least a part of a network, wherein the system comprises
• means configured for reading a network representation of at least a part of the network in memory means; and
• processing means configured for providing a graph representation on the basis of at least a part of the network representation;
wherein the system further comprises
• processing means configured for providing one or more logical premises on the basis of said graph representation; and • processing means configured for solving said logical premises by means of a logical analysis tool/an inference machine and thereby deriving all possible solutions that meet one or more given criterion/criteria. According to one embodiment, one or more given criterion/criteria relate (s) to one or more of the following:
• determination of all possible routes in at least a part of the network representation; and
• determination of all loops in at least a part of the network representation.
According to one embodiment said graph representation comprises one or more of
• two or more nodes;
• one or more edges;
• one or more graph connecting points; • zero, two or more external terminals.
According to one embodiment said graph representation is non-oriented.
According to one embodiment said processing means are configured for providing said graph representation by
• each connection in said at least a part of the network representation yielding an edge in the graph representation;
• each connecting point between at least two connections in said at least a part of the network representation yielding a node in the graph representation; • each edge being provided with two separate graph connecting points at each end associated with the node too which the edge is connected; and
• zero, two or more external terminals.
According to one embodiment, said logical premises for said graph representation comprise • one or more logical premises for each graph connecting point that define (s) that a route goes in, that a route goes out, or no route in said graph connecting point, respectively; • one or more logical premises for each node that define (s) maximally a route in and a route out simultaneously, or no route.
According to one embodiment, said logical premises for said graph representation comprise
• one or more logical premises for each edge connected to two nodes that define maximally a route in and a route out simultaneously, or no route.
According to one embodiment said logical premises for said graph representation comprise
• one or more logical premises for each external ter- minal given in that a given route either starts, ends or neither starts nor ends in the external terminal.
According to one embodiment said network representation represents one or more of the following:
power supply networks; electrical networks; relay systems; pipe connections; a transport system; a travel plan; electrical supply nets; and other electronical networks. The invention will now be explained more fully below and with reference to the drawing, in which:
Figure 1 shows a wiring plan for a network that is rela- tively complex from a calculation/processing point of view;
Figure 2 shows a relatively less complex example of a wiring plan that will, in combination with the descrip- tion of the subsequent figures, be used to illustrate one embodiment of the method according to the invention;
Figure 3 shows a network representation wherein the switches are insulated;
Figure 4 shows a graph representation of the insulated switches (Figure 3) ;
Figure 5 shows the graph representation after addition of connecting points;
Figure 6 shows a node with three connecting points;
Figure 7 shows an edge;
Figure 8 shows the divided graph;
Figure 9 shows a flowchart for one embodiment of the invention;
Figure 10 shows one embodiment for providing the graph representation;
Figure 11 shows one embodiment for providing one or more logical premises; and Figure 12 shows a block diagram for a system according to one embodiment of the invention.
Figure 1 shows a wiring plan for a network that is rela- tively complex from a calculation/processing point of view. However, the network is an example of a relatively simple electrical relay system. In this small construction there are 28 switches which means that a complete testing of the construction would involve the testing of all possible combinations of the positions of the 28 switches, ie 228 (about 16 million) combinations, which is not realistically feasible.
A reduction in the number of calculations can be pro- vided, however, by combining parallel and serial contacts to a number of equivalent replacement switches that are defined by logical functions, OR and AND, respectively. In this manner this plan can be reduced to comprise only 9 switches (about 512 combinations) . However, it is not an option for all networks to be reduced in this manner.
In the following, a less comprehensive example will be explained to illustrate the invention in a clear manner. Identical principles are used irrespective of the size of the network.
Figure 2 shows a relatively less complex example of a wiring plan that will, in combination with the description of the subsequent figures, be used to illustrate one embodiment of a method according to the invention.
Shown in the figure is a very simplified relay system with five switches Ki through K5 and a coil relay Ri. An ordinary analysis of the electrical network would require that a calculation be performed whether the coil relay Ri pulls or not for each combination of the positions of the switches, ie 25 (32) combinations. In principle it would be necessary to calculate the consequences for each of the 32 combinations in order to determine whether the relay Ri pulls or not.
In the following it will be shown how such five contacts can be reshaped to one single 'super-switch' that is strictly logically equivalent to the five switches. In this manner it is necessary to calculate the consequences for each of the positions of this super-switch only, ie a total of two calculations. Hereby the calculation time necessary to derive the result of the analysis is considerably reduced. In particular for very comprehensive networks .
It is thus the object to define a logical expession for the switch connections and on the basis of the topology of the switches that describe when there is connection between A and B corresponding to the super-switch being on, an hence also when there is no connection, corresponding to the switch being off.
It is not readily possible to reduce the contact combination shown in Figure 2 to a logical expression in order to thereby achieve advantages from a calculation point of view, as was the case for the example shown in Figure 1 by use of eg AND and OR relations.
In the following it will be demonstrated how an automated method can set up the table that describes when there is electrical connection between A and B.
In order to utilize the invention the system/network shown in Figure 2 must be converted to a graph represen- tation wherein each switch is replaced by an edge. In practice this graph is not drawn, but derived from a da- tabase, a data file, etc. that represent eg a CAD drawing, and it will be possible to proceed directly to Figure 8 and its associated description. For pedagogical reasons each step will be explained to better illustrate one embodiment of the method according to the invention.
Figure 3 illustrates a network representation, wherein the switches K have been insulated. This representation corresponds to the representation shown in Figure 2, but wherein all other elements, except the switches, have been removed. This representation forms the basis of the further analysis.
Figure 4 illustrates a graph representation of the insu- lated contacts (Figure 3) . Shown is a graph corresponding to the network in Figure 3 that consists of two terminals
(A,B), four nodes (Pi ... P4) and seven edges (Ki ... K7) - wherein Nos 1 through 5 are equivalent to the switches in
Figures 1 and 2, and 6 and 7 describe the electrical con- nection between terminals A and B and the remaining network. It is to be noted that this exemplary graph has no orientation. Each edge K describes a switch or an electrical connection, wherein the route can take its course in both directions.
It is the object eg to determine all possible routes within the graph between A and B. Each of the possible routes between A and B represents a possible electrical connection between A and B. This means that if all possi- ble routes are known, it would be the equivalent of a connected 'super-switch' whereas the remaining combinations do not give any connection and are thus equivalent to a disconnected super-switch.
Figure 5 shows the graph representation following addition of connecting points fp . The connecting points fp are introduced as a new element for describing the interfaces between nodes/edges and terminals/edges. By use of a connecting point, it is possible to describe whether something goes in or goes out of the relevant node. In the figure, these connecting points are shown with a cross and provided with reference numerals fpi through
In order to be able to describe what goes in and goes out through a connecting point fp, variables are introduced that describe at least three states for a given connecting point. Either that 'nothing neither goes in nor goes out' or 'something goes in or goes out'. Note that there is not such option that anything both 'goes in' and 'goes out', since it would not yield a sensible route in a graph if the route goes in and goes out through the same edge .
As stated in the below table it is possible to represent the three states either by two logical variables or a numerical variable. The easiest representation is to use a numerical variable, but not al logical analysis tools are able to handle numerical variables, so most often it is necessary to use two logical variables. One that de- scribes whether something goes 'in' and one that describes whether something goes 'out' of the relevant connecting point.
Figure imgf000018_0001
A node has a final number of connecting points corresponding to the number of edges that are connected to the node. In this example only nodes with three connecting points have been used, but notes with two, four or five or more connecting points can readily be used.
Analogously with an electrical network it is possible to define properties/logical premises for the nodes, eg that the sum of what goes to and away from the node must be zero, to be construed that if something goes into a node, something must also go out of the node. The logic that describes this functionality of the nodes does, in reality, describe the relation between the connecting points. Ie the functionality of the nodes is given by the selected properties that are ascribed to the relations between the connecting points. Eg if something comes into a connecting point, it must go out of another connecting point. This is elaborated on in connection with Figure 6.
Figure 6 shows a node with three connecting points . Kirchoff's current law states that the current to/from a node must be zero. Analogously with this, the requirement that what comes in must also come out can also be represented by:
o = ∑Jp
wherein fp designates all the connecting points associated with the same node.
Now follows examples of how to represent a node in vari- ous logical analysis tools.
Example with numerical variables
Array Technology ApS has developed a tool for modelling logical systems (cf eg international patent application
No PCT/DK99/00132) . In this tool a number of rela- tions/logical equations between various variables can be specified. The tool is then able to deduct all information inferences for the specified system.
A considerable advantage obtained by use of this tool consists in that ia integer values can be handled on an equal footing with logical variables so as to enable representation of eg the connecting points with numerical variables that can for instance assume the value -1, 0 or +1 as listed in the above table.
The example shown in Figure 6 has three connecting points. Utilisation of the numerical representation of the connecting points will make the following equation apply:
0 fp_+fp_4-fp3
If all combinations of fp +fp2+fp3 were listed in a table, it would be possible to decide which combinations meet the above requirement
Figure imgf000020_0001
Figure imgf000021_0002
Since every combination of fpl f fp2 and fp3 is either true or false, it suffices to save the true combinations that are listed in the below table. These are referred to as the admissible combinations. This is also designated the affirmative normal form, eg according to O.I. Franksen, 'Booles', Development Process revisited', Actar Historica Leopoldina 27, 1997, pp 175-188.
Figure imgf000021_0001
Example with boolean variables
It will be possible to list the same representation in a system in which only ordinary Boolean variables are an option. That means that it is necessary to use six logical variables 2 for each connecting point that describes 'in' and 'out', respectively.
In different logical analysis tools there are different ways to describe the logical bindings. For instance, a quantifier can be introduced that counts how many 'in'- variables and 'out ' -variables, respectively, that are true to ensure that the amount/number of 'goings-in' to the system is the same as the amount/number of ' goings- out' of the system. At the same time it must be specified that 'in' and 'out' for the same variable cannot be true at the same time.
If Array Technology's Build tool is used, a specification of the logical premises for the node shown in Figure 6 could be as follows:
1. Variable types;
2. fp: 3. {
4. in : boolean :
5. out : boolean;
6. } ;
7. Variables 8. fpl : fp;
9. fp2: fp:
10. fp3: fp;
11. Relations
12. not (f pi . in and f pi . out) ; 13. not (fp2. in and fp∑ . out) ;
14. not (fp3. in and fp3. out) ; 15. (fpl . in+fp2. in+fp3. in) - (fpl . out+fp2. out+fp3. out) ,
Wherein: lines 1 through 6 specify a variable type fp that consists of to logical variables, in and out; lines 7 through 10 establish the variables fpi , fp2 and fp3; lines 12 through 14 specify that the route cannot both go in and out at the same time; line 15 specifies that just as much must go in as goes out of the node.
The below table shows the relation between the three con- necting points.
Figure imgf000023_0001
This table is a 'one-to-one' mapping (ie an alternative and equivalent specification) of the table for the nu- merical representation of the admissible combinations.
Figure 7 shows an edge. An edge is characaterised in that it is connected to two and only two nodes. That is, it always has two connecting points and what enters at the one end leaves by the other, and vice versa. It follows that the same assumption applies as was the case with the node .
Figure imgf000024_0001
If the edge is used by a route, it must be indicated on the edge so that it can be seen that this path is being used. Therefore a Boolean variable K is introduced that describes whether the edge is being used or not. If only one of the connecting points is used, the edge is also used, and since the one connecting point cannot be used without the other, it suffices to set up the relation between one of the connecting points and K, such that K is true when something either enters or leaves by the connecting point.
An example of representation of edges with numerical variables
For the edge K with two connecting points fpl, fp2 the same requirements are made as was the case with the node:
0 = fp_ + fp2
that yields the following admissible combinations.
Figure imgf000024_0002
The relation that describes whether the edge is used can be described either as the relation between K and eg fpi, since the one connecting point cannot be used without the other.
Figure imgf000024_0003
This will yield the following admissible combinations,
Figure imgf000025_0002
In order to ensure logical inference between the two tables, they can be combined to one table, whereby the logical inference through fpl is ensured. See optionally "On the technology of array-based logic", Gert L. Møller, Phd. Thesis, pp 27 and 28.
Figure imgf000025_0001
Example of representation of edges with boolean variables
The use of logical variables enables an equivalent representation by means of the following specification in Array Technology's Build tool:
1 . Variable types
2. fp:
3. {
4. in : boolean :
5. out : boolean;
6. } ;
7. Variables
8. fpl :fp;
9. fp2: fp:
10. K: boolean
11 . Relations 12. not (fpl . in and fpl . out) ,
13. not (fp2. in and fp∑ . out) ,
14. fpl . in - fp∑ . out
15. fp2. in - fpl . out;
16. K = (fpl . in or fpl . out) ,
Wherein :
Lines 1 through 6 specify a type of variable fp that consists of two logical variables 'in' and
' out ' ; lines 7 through 10 set up the variables fpl, fp2 and K; lines 12 and 13 specify that the route cannot both go in and out of the same connecting point simultaneously; lines 14 and 15 specify that what goes in by fpl goes out by fp2, and vice versa; line 16 specifies that K is true if and only if the route goes in or out by fpl.
The table below shows the relation between the two connecting points and K.
IlillflllJII ilϋiiltlli
False True True False True
False False False False False
True False False True True
This table is equivalent to the table for the numerical representation of the admissible combinations.
In order to enable determination from where and to where it is desired that the route should be, a new type of component is introduced - External terminal . The external terminal is associated with a property that tells whether the route is to begin or end from the terminal in question, including the option that it neither starts nor ends. The domain for this property is equiva- lent to the domain for the connecting point.
The component as such has only one connecting point to the remaining graph, through which it is communicated whether the route leads to or away from this external terminal. This means that the property set for the relevant terminal must be transferred to the connecting point such that - when something is to start from the terminal - the connecting point must be set to the route leaving the terminal, and vice versa if it is desired that so e- thing should end in the terminal.
Example of representation of external terminal with numerical variables
For a terminal T and a connecting point fpl a variable T is introduced that describes whether something starts or ends in the terminal, eg the following convention could be selected:
lllftl
Nei ther starts nor ends
Starts +1
Ends -1
When the route starts from the termina (T=+l) it will mean, with the selected convention, that the route leads away from the terminal (f r=-l) . Which means that there is a change of sign digit, viz:
T=-fpι As will be expressed in the following table,
Figure imgf000028_0001
Example of representation of external terminals with Boolean variables
In a corresponding manner a Boolean representation of external terminals with Boolean variables can be introduced.
To represent the terminal property, two Boolean variables, T. Start and T. End, are introduced. Use of these logical variables makes it possible to achieve an equivalent representation by means of the following specification in Array Technolgy's Build tool:
1 . Varxable types
2. fp:
3. {
4. in : boolean:
5. out : boolean;
6. } . ExTerm;
8. {
9. Start : boolean
10. End:boolean
11 . ) ;
12. Variables
13. fpl :fp
14. Tl . -ExTer ;
15. Relations 16. not (fpl . in and fpl . out) ;
17. Tl . Start=fpl . out
18. Tl .End=fpl . in;
Wherein
• Lines 2 through 6 specify a type of variable fp that consists of two logical variables 'in' and ' out ' ;
• lines 7 through 11 specify a type of variables ExTerm, that consists of two logical variables Start and End;
• lines 13 and 14 set up the variables fpl and Tl ;
• Line 16 specifies that the route cannot both go in and out of the same connecting point simultaneously;
• line 17 specifies that what starts in Tl goes out by fpl ;
• line 18 specifies that if something ends in Tl it must go in by fpl .
The below table states the relation between the terminal Tl and the one connecting point fpx.
.MliBiBi igniϋai
False True True False
False False False False
True False False True
Note that there is no admissible combination wherein Tl . Start and Tl . End are both true at the same time.
The next task is to translate the topography of the graph to a specification that the logical analysis tool is able to interpret. This can be accomplished by breaking down the graph into the three defined basic components whereby all parts of the graph are represented.
Example of representation of graph
By cutting in two all connecting points in the graph of Figure 5, it can be divided into two terminals, four nodes and seven edges. This is shown in Figure 8.
Figure 8 shows the divided graph. The graph has been broken down into the three basic components - edges, nodes and external terminals.
Each component can be specified accurately. For instance the edge Ks that is situated between the connecting points fpi and fp2 can be specified as
Edge (K6, fpl, fp2);
and node PI can be specified as:
Node (PI, fp2, fp3, fp4);
In this manner it is possible to continue until all the components have been specified. The example of Figure 8 could be as follows:
ExTerm (A, fpi) ; ExTerm (B,fp14) : Node (Pl r fp2, fp3, fPi) ! Wode fP2, fp5, fp6, fp9) ; Node (P3, fp7, fps, fpio) I Node (P4, fpur fpi2r fpi3) ■ Arc (Kl r fp4, fp5) ; Arc (K2, fp6r fpi) ; 9. Arc (K3, fpio, fpu) t
10. Arc (K4, fp9, fpn) ;
11 . Arc (K5, fp3, fp8) ;
Figure imgf000031_0001
13. Arc (Klr fpi3, fp1 ) i
Wherein
• Lines 1 and 2 specify the external terminals;
• Lines 3 through 6 specify the nodes
• Lines 7 through 13 specify the edges.
It will be possible to use a number of different logical analysis tools to analyse the graph, eg Prolog, NP-tools, VDM, B, Z, Beologic. In the following array-based logic as described in Gert L. Møllers PhD-thesis On the technology of array based logic is used as example, and all the examples have been implemented in Array Database from Array Technology ApS .
Example of construction of logical model
Taking each of the specified components and replacing them by the associated logical tables will yield the following 13 tables.
1 . ExTerm (A, fp ) ;
Figure imgf000031_0002
2. ExTerm (B,fp14)
Figure imgf000032_0003
3. Node(Plr fp2r fp3r fp4>
Figure imgf000032_0004
4. Node(P2r fp5, fpe, fps)
Figure imgf000032_0001
5. Node(P3, fp7r fp8r fpio)
Figure imgf000032_0002
Figure imgf000033_0004
6. Node(P4, fpu, fpiz, fpis)
Figure imgf000033_0001
Figure imgf000033_0002
Figure imgf000033_0003
Figure imgf000033_0005
9. Arc(K3r pio, fpi∑)
Figure imgf000034_0003
10. Arc(K4r fps, fpu)
Figure imgf000034_0001
11. Arc(K5, fp3 fp8)
Figure imgf000034_0004
Figure imgf000034_0002
With the theory of array-based logic these tables can be combined to one table that tells all the paths from A to B. For instance, one could start by combining tables 1 and 12, as they contain a shared variable fpx
Figure imgf000035_0002
-1 +1 True
False
+1 -1 True
In order to ensure logical consistency, only those combi¬ nations of rows wherein fpi are the same can be combined. For the two tables above it means that they can be com¬ bined row by row
Figure imgf000035_0001
Since the columns of the two fpi are the same it is possible to delete one of the columns, thereby yielding the following table
MiBfe. 8*111
-i +ι +1 True
False
+ι -i -1 True
Apart from this fpi is not found in any other tables, and therefore it can be deleted entirely from the table, since this information is no longer required, which yields the following
fllli
+1 + 1 True
False
-1 True
From the above table, it clearly appears that only when A is 0 will K6 be false. This means that the edge Ks is not used unless something goes to or from terminal A, which will also easily appear from the graph shown in Figure 4.
In a corresponding manner one may continue to combine all of the tables until a table is accomplished that describes all possible the combinations of used edges and the possibili ty of connection between A and B.
■SΪS MM Si
0
-1
-1
-1
-1
-1
-1
6 and K7 do not represent a switch, but merely the connection between the terminal and the first node. There- fore these two edges can be removed. Also note that K6 and K7 are both true for all possible solutions where there is a connection between A and B, which is in correspondence with the graph of Figure 4.
Figure imgf000037_0001
Table 1 : The complete system table
Analysis of the graph
The above table shows a number of properties for the graph shown in Figure 4. For instance which paths that exist between A and B, or which loops that are present in the graph. This will be illustrated in further detail in the following.
Which paths are there between A and B?
By selecting those rows where A and B are different from 0, all the rows are obtained where something goes into or out of A or B.
Figure imgf000037_0002
\mm\mil
Figure imgf000038_0002
From these one needs to know which edges in the graph that are used, and the information on A and B is more or less irrelevant, ie columns A and B can be deleted.
Figure imgf000038_0003
Rows 1 and 5 are identical, ie they represent the same path between A and B, and therefore one of the solutions can be removed. The same applies to 2 and 6, 3 and 7 as well as 4 and 8. This yields the four possible paths between A and B.
Figure imgf000038_0001
The first row shows that a possible path between A and B is through the edges Ki and K4. Translated to Figure 3 this means that there is electrical connection between A and B when the switches K_ and K4 have been connected. This can be translated into the following logical description:
Pathl=Kι and K4;
Ie Pathl is true when Kx and K4 are connected/true . In a corresponding manner the three other rows can be translated.
Figure imgf000039_0001
Path3 = K3 and K5;
Path4 = K2 and K4 and K5;
There will be connection between A and B when one of the paths is true, ie the equivalent super-switch is con- nected when one of the paths is true, and only if all four paths are false will the super-switch be interrupted. This yields the following logical description of the super-switch:
super-switch = Pathl or Path2 or Path3 or Path ;
thereby the five switches can be replaced by this super- switch.
Hereby all possible solutions have been determined and automated analysis of even very large networks has been enabled.
One example of a use is a transport network with a number of possible mounting and dismounting stations. An external terminal is added for each possible mounting and dis- mounting station. Two external terminals can be desig¬ nated as Start and End destination, respectively, follow¬ ing the analysis is able to derive all possible routes between the Start and End destinations, such that all the ways in which it is possible to go from Start to End can be determined. This can be used eg in a route planning tool. Additionally, the edges can also be associated with a number of properties, such as price, distance, time, etc. whereby a subsequent analysis would be able to sum up eg the total time consumption, price, distance to go from Start to End.
Loops in the graph
If nothing goes in or out of A or B it will mean that something goes around the graph, and since it is possible only to start or end something in the terminals it must mean that the path "bites its own tail", ie a loop.
Selection of the rows wherein A and B are 0 in Table 1 yields the following table.
Figure imgf000040_0001
In the first row all of the edges are zero, which is a valid solution since it means that the entire sys¬ tem/network is at rest. The three remaining solutions show that in this graph there are three loops, which can also be checked in the graph shown in Fig. 4.
PIE mm MM
Figure imgf000041_0001
Hereby all loops in the graph/network representation are provided and automatic analysis is enabled.
Figure 9 shows a flowchart for one embodiment of the invention. In step (901) the procedure is initiated.
In step (902) relevant information/data are read, eg from a database, one or more files, a network, etc, that in some way or other define the network to be analysed/processed.
In step (903) a graph representation is provided of the read network representation by scanning/parsing the read data or the database/file as such. This provision is carried out in accordance with a given syntax for a logical analysis tool/an inference machine. This corresponds eg to the wording given in connection with Figure 8.
The network representation is broken down by the construction/provision of the graph representation in a final number of smaller, well-defined components, as will be explained in further detail in connection with Figure 10, wherein a more detailed embodiment of the step (903) is shown and explained in connection therewith.
In step (904) the logical premises for each basic element in the graph representation are provided/laid down. The basic elements can be eg one or more edges K, graph connecting points fp, external terminals and nodes.
Subject to further specification can be the logical premises that are to be complied with to solve a given prob- lem, such as determination of all routes in the graph and thus also the network representation.
A more detailed embodiment of step (904) is shown in Fig- ure 11 and will be explained in connection therewith.
In step (905) the logical premises in a logical analysis tool are solved to determine the solution space for' the logical rules/premises that have been formed.
In this manner all possible solutions that comply with one or more given requirements are determined in one step, once the logical premises are laid down. That is advantageous, in particular in connection with large net- works, rather than having an algorithm for instance for testing all possible routes in a network, for instance for determining the possible routes between two points.
Furthermore, this process can be automated completely merely by determining the logical premises once and for all. Then only input data are needed from a database, file, etc, to derive the solutions to a problem/an analysis that relates to a network structure.
Alternatively a further subsequent processing can be performed on the result by imposing further conditions/criteria, eg with a view to analysing the result in order to thereby be able to deduct and/or present various information, eg to a user, depending entirely on which problem is of interest. This corresponds to the result (Table 1) given as example above being both able to determine all possible loops (one problem) and listing all possible routes (another problem) in the network. Figure 10 shows one embodiment for the provision of the graph representation. Shown is a detailed flowchart for one embodiment of the step (903) in Figure 9.
In step (102) the graph connecting points are provided. This element is introduced to enable chaining of other elements (edges, nodes, and external terminals) .
Two graph connecting points are formed for each edge/connection (cf. Figure 7) and one point for each edge that is connected by a node (cf . Figure 6) . In step (103) the read data are scanned to identify connections in the network representation. They are converted to edges in the graph representation. The conver- sion depends on the syntax or notation used by the employed analysis tool. For instance, the notation given in connection with the description of Figures 4-8 can be used, whereby a connection is converted to an edge designated by Arc (Ki , p , fps) r wherein also the graph con- necting points associated with the respective edge are given. Alternatively the edge could be listed in table form as illustrated above.
In step (104) the nodes in the graph representation are provided. One node for each connecting point in the network representation is provided. This can be designated eg Node (P3, f i, fps, fpio) ; (wherein also the graph connecting points associated with the edges connected by the node are mentioned) or in table form.
In step (105) it is determined whether zero, two or more external terminals are to be provided or not, as this depends on the actual problem to be solved. For instance, it should say two or zero terminals if all routes between two points are to be determined or all possible loops in the network are to be determined, respectively. If no external terminals are to be mentioned, step (107) is the closing step, and otherwise step (106) is performed wherein the external terminals are provided in the graph representation.
For instance, the external terminals can be designated ExTerm (A, fp_) ; or be in table form.
Following completion of step (106), closing is performed in step (107) .
Following closing, step (904) in Figure 9 is performed. Steps (102) and (106) correspond to the course illus- trated in connection with Figures 2 through 8.
Alternatively steps (102), (103), (104) and (106) can be performed parallel or in other sequence than the one shown in the figure.
Figure 11 shows one embodiment for the provision of one or more logical premises. Shown is a detailed flowchart for one embodiment of the step (904) in Figure 9.
In step (112) the logical premises/rule (s) for each graph connecting point is/are provided. These premises define 'a route in' and 'a route out' or 'no route', respectively, for the given graph connecting point. These three states can be realised eg by two logical variables or a numerical variable as stated above in connection with Figure 5.
The two logical variables could eg be one that describes whether anything goes 'in' and one that describes whether anything goes 'out' of the relevant connecting point. The numerical variable must merely have a unique numerical value for each of the three states.
In step (113) the relevant logical premises for each note is/are provided. One such premise must determine that what comes into the given node must also come out. This can be represented by the sum of the numerical variables for all graph-connecting points that are in relation/connected to the given node having to be zero. This is also explained in connection with Figure 6.
In step (113) premises are provided for each edge. These logical premises state maximally a route in and a route out simultaneously or no route, respectively. This indi- cates that what comes in at the one end will also come out and vice versa.
Besides, one premise should mention if the edge is used by a route. This must be indicated on the edge so as to make it possible to ascertain visually whether the edge was used in the route in question. Therefore a Boolean variable K must be introduced that describes whether the edge has been used or not. If merely one of the connecting points has been used the edge has also been used, and since the one connecting point cannot be used without the other, this premise can be defined as the relation between one of the connecting points and K, such that K is true when something either goes in or out of the connecting point, and false when the connecting point is not used.
This has also been explained in connection with Figure 7.
Alternatively steps (112), (113) and (114) can be per- formed parallel or in another sequence than the one shown in the figure. Figure 12 shows a block diagram of a system according to one embodiment of the invention. Shown in the figure are processing/calculating means (122) that can be one or more random and sufficient CPUs.
The processing means (122) are connected to reading/input means (121) that are responsible for receiving information from eg a user, a hard disk, etc. The processing means (122) are also connected to one or more external and/or internal storages/memories (123) for storing and reading results, variables, etc. The storages/memory (123) can also comprise the data that define the network representation, such as eg a CAD file. The storage/memory (123) can be of any type of RAM, hard disk, etc. and a combination is preferred.
The processing means (122) are further connected to presentation means (124), such as eg a display for the pres- entation/communication of information, options, results, etc. to a user.
The processing means (122) are responsible for executing a program that enables the method.

Claims

C l a i m s
1. A method for logical analysis of at least a part of a network, wherein the method comprises
• reading of a network representation of at least a part of the network; and
• provision of a graph representation on the basis of at least a part of the network representation;
characterised in that the method further comprises
• provision of one or more logical premises on the basis of said graph representation; and • solving said logical premises by means of a logical analysis tool/an inference machine and thereby deriving all the possible solutions that meet one or more given criteria.
2. A method according to claim 1, characterised in that said one or more given criteria relate (s) to one or more of the following:
• determination of all possible routes in at least a part of the network representation; and
• determination of all possible loops in at least a part of the network representation.
3. A method according to claim 1 or 2, characterised in that said graph representation comprises one or more of
• two or more nodes;
• one or more edges;
• one or more graph connecting points; • zero, two or more external terminals.
4. A method according to claims 1-3, characterised in that said graph representation is non-oriented.
5. A method according to claims 1-4, characterised in that said graph representation is provided by
• each connection in said at least a part of the network representation yielding an edge in the graph representation; • each connecting point between at least two connections in said at least a part of the network representation yielding a node in the graph represen- taion;
• each edge being provided with two separate graph connecting points at each end associated with the node to which the edge is connected; and
• zero, two or more external terminals.
6. A method according to claims 1-5, characterised in that said logical premises for said graph representation comprise
• one or more logical premises for each graph connecting point that defines that a route goes in, that a route goes out, or no route in said given graph connecting point, respectively:
• one or more logical premises for each node that defines maximally a route in and a route out simultaneously, or no route.
7. A method according to claims 1-6, characterised in that said logical premises for said graph representation comprise • one or more logical premises for each edge connected to two nodes that define maximally a route in and a route out simultaneously, or no route.
8. A method according to claims 1-7, characterised in that said logical premises for said graph representation comprise
• one or more logical premises for each external ter- minal given by a given route either starting, ending or neither starts nor ends in the external terminal.
9. A method according to claims 1-8, characterised in that said network representation represents one or more of the following:
• power supply networks;
• electrical networks;
• relay systems; • pipe connections ;
• a transport system;
• a travel plan;
• electrical supply nets ; and
• other electronical networks .
10. A computer system comprising means for executing a programme, wherein the programme will, when it is executed, cause the computer system to perform the method according to claims 1-9.
11. A computer-readable medium that comprises a programme written thereon, wherein the programme, when it is executed, causes a computer to perform the method according to claims 1-9.
12. A system for logical analysis of at least a part of a network, wherein the system comprises
• means (121) configured for reading a network repre- sentation of at least a part of the network into memory means (123) ; and
• processing means (122) configured for providing a graph representation on the basis of at least a part of a network representation; characterised in that the system further comprises
• processing means (122) configured for providing one or more logical premises on the basis of said graph representation; and • processing means (122) configured for solving said logical premises by means of a logical analysis tool/an inference machine and thereby deriving all the solutions that meet one or more given criteria.
13. A system according to claim 12, characterised in that said one or more given criteria relate (s) to one or more of the following:
• determination of all possible routes in at least a part of the network representation; and
• determination of all possible loops in at least a part of the network representation.
14. A system according to claim 12 or 13, characterised in that said graph representation comprises one or more of
• two or more nodes;
• one or more edges; • one or more graph connecting points;
• zero, two or more external terminals.
15. A system according to claims 12-14, characterised in that said graph representation is non-oriented.
16. A system according to claims 12-15, characterised in that said processing means (122) are configured for providing said graph representation by
• each connection in said at least a part of the network representation yielding an edge in the graph representation;
• each connecting point between at least two connections in said at least a part of the network representation yielding a node in the graph representation; • each edge being provided with two separate graph connecting points at each end connected to the node to which the edge is connected; and
• zero, two or more external terminals.
17. A system according to claims 12-16, characterised in that said logical premises for said graph representation comprise
• one or more logical premises for each graph connect- ing point that define (s) that a route goes in, that a route goes out, or no route in the given graph connecting point, respectively;
• one or more logical premises for each node that define (s) maximally a route in and a route out simul- taneously, or no route.
18. A system according to claims 12-17, characterised in that said logical premises for said graph representation comprise • one or more logical premises for each edge connected to two nodes that define maximally a route in and a route out simultaneously, or no route.
19. A system according to claims 12-18, characterised in that said logical premises for said graph representation comprise
• one or more logical premises for each external ter- minal given by a given route either starting, ending or neither starts nor ends in the external terminal.
20. A system according to claims 12-19, characterised in that said network representation represents one or more of the following:
• power supply networks;
• electrical networks;
• relay systems; • pipe systems, a transport system; a travel plan; electrical supply nets; and
• other electronical networks
PCT/DK2001/000359 2000-05-26 2001-05-23 Method and system for logical analysis of a network representation WO2001090958A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001262064A AU2001262064A1 (en) 2000-05-26 2001-05-23 Method and system for logical analysis of a network representation

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DKPA200000837 2000-05-26
DKPA200000837 2000-05-26

Publications (1)

Publication Number Publication Date
WO2001090958A1 true WO2001090958A1 (en) 2001-11-29

Family

ID=8159519

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DK2001/000359 WO2001090958A1 (en) 2000-05-26 2001-05-23 Method and system for logical analysis of a network representation

Country Status (2)

Country Link
AU (1) AU2001262064A1 (en)
WO (1) WO2001090958A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5063520A (en) * 1990-07-06 1991-11-05 Klein Dennis H Computer aided process for network analysis
US5715432A (en) * 1995-04-04 1998-02-03 U S West Technologies, Inc. Method and system for developing network analysis and modeling with graphical objects

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5063520A (en) * 1990-07-06 1991-11-05 Klein Dennis H Computer aided process for network analysis
US5715432A (en) * 1995-04-04 1998-02-03 U S West Technologies, Inc. Method and system for developing network analysis and modeling with graphical objects

Also Published As

Publication number Publication date
AU2001262064A1 (en) 2001-12-03

Similar Documents

Publication Publication Date Title
CN112215374B (en) Method, system, equipment and medium for checking long-term overhaul plan in power grid
KR100268211B1 (en) Redundant vias
US20040015805A1 (en) Layout quality analyzer
JPH08194726A (en) Circuit simulation model extraction method and device therefor
JP2003280924A (en) Method for processing event having hierarchical structure in communication equipment system
Ohtsuki The two disjoint path problem and wire routing design
CN112688310A (en) Line loss analysis method and device applied to power distribution network
US6691079B1 (en) Method and system for analyzing test coverage
CN115017566A (en) Secondary beam structure generation method based on BIM platform and related equipment
US7131085B2 (en) Distributed BDD reordering
WO2001090958A1 (en) Method and system for logical analysis of a network representation
CN115130043B (en) Database-based data processing method, device, equipment and storage medium
US9600613B1 (en) Block-level code coverage in simulation of circuit designs
CN113485940A (en) Combined test case generation method based on parameter abstract modeling
CN110727249B (en) Method for controlling maximum permitted behavior information of automatic manufacturing system based on unobservable events
US5950204A (en) Determining apparatus and determining method for inclusion relation between sets of parallel multiple ladder-structured data
KR101837236B1 (en) Basic block size considering execution path exploration method and system for improving the code coverage
Narahari et al. Discrete event simulation of distributed systems using stochastic Petri nets
KR100898751B1 (en) Layout Method for Protein-Protein Interaction Networks based on Seed Protein
CN104252346B (en) A kind of method and device concurrently analyzed
CN106850270B (en) IEC61850 key logic node identification method
Wang et al. Stochastic timed petri nets and stochastic petri nets
CN113421105A (en) Big data fraud prevention based information processing method and artificial intelligence monitoring system
CN114385686A (en) Method and system for realizing complex event processing in distributed stream data processing engine
Wohlin et al. Performance analysis in the early design of software

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ CZ DE DE DK DK DM DZ EC EE EE ES FI FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP