DE69625597D1 - I/o-prozessor architektur mit integrierter pci-pci brücke - Google Patents

I/o-prozessor architektur mit integrierter pci-pci brücke

Info

Publication number
DE69625597D1
DE69625597D1 DE69625597T DE69625597T DE69625597D1 DE 69625597 D1 DE69625597 D1 DE 69625597D1 DE 69625597 T DE69625597 T DE 69625597T DE 69625597 T DE69625597 T DE 69625597T DE 69625597 D1 DE69625597 D1 DE 69625597D1
Authority
DE
Germany
Prior art keywords
pci
integrated
processor architecture
bridge
pci bridge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69625597T
Other languages
English (en)
Inventor
Elliot Garbus
Peter Sankhagowit
Marc Goldschmidt
Nick Eskandari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE69625597D1 publication Critical patent/DE69625597D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
DE69625597T 1995-06-15 1996-06-17 I/o-prozessor architektur mit integrierter pci-pci brücke Expired - Lifetime DE69625597D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US49065495A 1995-06-15 1995-06-15
PCT/US1996/010451 WO1997000480A1 (en) 1995-06-15 1996-06-17 Architecture for an i/o processor that integrates a pci to pci bridge

Publications (1)

Publication Number Publication Date
DE69625597D1 true DE69625597D1 (de) 2003-02-06

Family

ID=23948953

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69625597T Expired - Lifetime DE69625597D1 (de) 1995-06-15 1996-06-17 I/o-prozessor architektur mit integrierter pci-pci brücke

Country Status (9)

Country Link
US (1) US5884027A (de)
EP (1) EP0834135B1 (de)
JP (1) JPH11513150A (de)
KR (1) KR100263277B1 (de)
CN (1) CN1137442C (de)
AU (1) AU6334496A (de)
DE (1) DE69625597D1 (de)
RU (1) RU2157000C2 (de)
WO (1) WO1997000480A1 (de)

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* Cited by examiner, † Cited by third party
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KR19990022950A (ko) 1999-03-25
WO1997000480A1 (en) 1997-01-03
CN1193393A (zh) 1998-09-16
CN1137442C (zh) 2004-02-04
KR100263277B1 (ko) 2000-08-01
EP0834135A4 (de) 2001-09-12
US5884027A (en) 1999-03-16
AU6334496A (en) 1997-01-15
RU2157000C2 (ru) 2000-09-27
JPH11513150A (ja) 1999-11-09
EP0834135B1 (de) 2003-01-02
EP0834135A1 (de) 1998-04-08

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