DE3280451T2 - Verfahren zur Initialisierung eines Datenverarbeitungssystems. - Google Patents

Verfahren zur Initialisierung eines Datenverarbeitungssystems.

Info

Publication number
DE3280451T2
DE3280451T2 DE3280451T DE3280451T DE3280451T2 DE 3280451 T2 DE3280451 T2 DE 3280451T2 DE 3280451 T DE3280451 T DE 3280451T DE 3280451 T DE3280451 T DE 3280451T DE 3280451 T2 DE3280451 T2 DE 3280451T2
Authority
DE
Germany
Prior art keywords
initializing
data processing
processing system
data
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3280451T
Other languages
English (en)
Other versions
DE3280451D1 (de
Inventor
Barry L Rubinson
Edward A Gardner
William A Grace
Richard F Lary
Dale R Keck
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of DE3280451D1 publication Critical patent/DE3280451D1/de
Application granted granted Critical
Publication of DE3280451T2 publication Critical patent/DE3280451T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4405—Initialisation of multiprocessor systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356—Indirect interconnection networks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
DE3280451T 1981-10-05 1982-10-05 Verfahren zur Initialisierung eines Datenverarbeitungssystems. Expired - Fee Related DE3280451T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/308,826 US4449182A (en) 1981-10-05 1981-10-05 Interface between a pair of processors, such as host and peripheral-controlling processors in data processing systems

Publications (2)

Publication Number Publication Date
DE3280451D1 DE3280451D1 (de) 1994-05-26
DE3280451T2 true DE3280451T2 (de) 1994-11-17

Family

ID=23195552

Family Applications (2)

Application Number Title Priority Date Filing Date
DE3280451T Expired - Fee Related DE3280451T2 (de) 1981-10-05 1982-10-05 Verfahren zur Initialisierung eines Datenverarbeitungssystems.
DE8282109214T Expired - Fee Related DE3280286D1 (de) 1981-10-05 1982-10-05 Schnittstellenanordnung in einem datenverarbeitungssystem.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8282109214T Expired - Fee Related DE3280286D1 (de) 1981-10-05 1982-10-05 Schnittstellenanordnung in einem datenverarbeitungssystem.

Country Status (6)

Country Link
US (1) US4449182A (de)
EP (2) EP0077008B1 (de)
JP (1) JPS58501740A (de)
CA (1) CA1183273A (de)
DE (2) DE3280451T2 (de)
WO (1) WO1983001326A1 (de)

Families Citing this family (191)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4777595A (en) * 1982-05-07 1988-10-11 Digital Equipment Corporation Apparatus for transferring blocks of information from one node to a second node in a computer network
GB8309770D0 (en) * 1983-04-11 1983-05-18 Inmos Ltd Microcomputer
US4600990A (en) * 1983-05-16 1986-07-15 Data General Corporation Apparatus for suspending a reserve operation in a disk drive
US4644547A (en) * 1984-06-28 1987-02-17 Westinghouse Electric Corp. Digital message format for two-way communication and control network
US4882674A (en) * 1985-03-05 1989-11-21 Wang Laboratories, Inc. Apparatus and method for control of one computer system by another computer system
IT1184553B (it) * 1985-05-07 1987-10-28 Honeywell Inf Systems Architettura di sistema a piu' processori
US4706080A (en) * 1985-08-26 1987-11-10 Bell Communications Research, Inc. Interconnection of broadcast networks
JPS6272051A (ja) * 1985-09-24 1987-04-02 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 多重プロセツサ・システム中の多重同時処理制御方法
US4972312A (en) * 1985-11-04 1990-11-20 U.S. Philips Corporation Multiprocess computer and method for operating same having context switching in response to a peripheral interrupt
JPH0778781B2 (ja) * 1986-06-02 1995-08-23 株式会社日立製作所 情報転送方法
US4975829A (en) * 1986-09-22 1990-12-04 At&T Bell Laboratories Communication interface protocol
US4829425A (en) * 1986-10-21 1989-05-09 Intel Corporation Memory-based interagent communication mechanism
US4942552A (en) * 1986-11-20 1990-07-17 Allen-Bradley Company, Inc. Method and apparatus for saving and performing industrial control commands
US5418970A (en) * 1986-12-17 1995-05-23 Massachusetts Institute Of Technology Parallel processing system with processor array with processing elements addressing associated memories using host supplied address value and base register content
US5020024A (en) * 1987-01-16 1991-05-28 Stratus Computer, Inc. Method and apparatus for detecting selected absence of digital logic synchronism
JPS6432379A (en) * 1987-07-29 1989-02-02 Hitachi Ltd Computer
US4905232A (en) * 1987-08-13 1990-02-27 Digital Equipment Corporation Peripheral repeater box
US5367688A (en) * 1987-09-04 1994-11-22 Digital Equipment Corporation Boot system for distributed digital data processing system
US4897786A (en) * 1987-09-04 1990-01-30 Digital Equipment Corporation Bus window interlock
US5136718A (en) * 1987-09-04 1992-08-04 Digital Equipment Corporation Communications arrangement for digital data processing system employing heterogeneous multiple processing nodes
US4887076A (en) * 1987-10-16 1989-12-12 Digital Equipment Corporation Computer interconnect coupler for clusters of data processing devices
US5204954A (en) * 1987-11-18 1993-04-20 International Business Machines Corporation Remote storage management mechanism and method
US5257374A (en) * 1987-11-18 1993-10-26 International Business Machines Corporation Bus flow control mechanism
JPH0776939B2 (ja) * 1988-03-16 1995-08-16 富士ゼロックス株式会社 通信ネットワークシステム
US4956771A (en) * 1988-05-24 1990-09-11 Prime Computer, Inc. Method for inter-processor data transfer
US4862454A (en) * 1988-07-15 1989-08-29 International Business Machines Corporation Switching method for multistage interconnection networks with hot spot traffic
US5053945A (en) * 1988-10-06 1991-10-01 Alphatronix System and method for performing a multi-file transfer operation
US5006982A (en) * 1988-10-21 1991-04-09 Siemens Ak. Method of increasing the bandwidth of a packet bus by reordering reply packets
US5097410A (en) * 1988-12-30 1992-03-17 International Business Machines Corporation Multimode data system for transferring control and data information in an i/o subsystem
US4965793A (en) * 1989-02-03 1990-10-23 Digital Equipment Corporation Method and apparatus for interfacing a system control unit for a multi-processor
US5131082A (en) * 1989-06-09 1992-07-14 International Business Machines Corporation Command delivery for a computing system for transfers between a host and subsystem including providing direct commands or indirect commands indicating the address of the subsystem control block
GB9012970D0 (en) * 1989-09-22 1990-08-01 Ibm Apparatus and method for asynchronously delivering control elements with pipe interface
US5218678A (en) * 1989-11-17 1993-06-08 Digital Equipment Corporation System and method for atomic access to an input/output device with direct memory access
EP0433472B1 (de) * 1989-12-18 1996-04-17 Siemens Aktiengesellschaft Verfahren zum gepufferten Datenaustausch zwischen Programmen einer Datenverarbeitungsanlage
JPH0619759B2 (ja) * 1990-05-21 1994-03-16 富士ゼロックス株式会社 マルチプロセッサシステムにおける相互通信方法
US5421014A (en) * 1990-07-13 1995-05-30 I-Tech Corporation Method for controlling multi-thread operations issued by an initiator-type device to one or more target-type peripheral devices
WO1992006430A1 (en) * 1990-09-28 1992-04-16 Fujitsu Limited Message control system in a data communication system
US5276877A (en) * 1990-10-17 1994-01-04 Friedrich Karl S Dynamic computer system performance modeling interface
US5313582A (en) * 1991-04-30 1994-05-17 Standard Microsystems Corporation Method and apparatus for buffering data within stations of a communication network
EP0520835A2 (de) * 1991-06-28 1992-12-30 Digital Equipment Corporation Verriegelungsschema für Geräte in einem Rechnersystem
US5390299A (en) * 1991-12-27 1995-02-14 Digital Equipment Corporation System for using three different methods to report buffer memory occupancy information regarding fullness-related and/or packet discard-related information
US5440690A (en) * 1991-12-27 1995-08-08 Digital Equipment Corporation Network adapter for interrupting host computer system in the event the host device driver is in both transmit and receive sleep states
US5386514A (en) * 1992-04-16 1995-01-31 Digital Equipment Corporation Queue apparatus and mechanics for a communications interface architecture
US5657471A (en) * 1992-04-16 1997-08-12 Digital Equipment Corporation Dual addressing arrangement for a communications interface architecture
US5386524A (en) * 1992-04-16 1995-01-31 Digital Equipment Corporation System for accessing information in a data processing system
US5481675A (en) * 1992-05-12 1996-01-02 International Business Machines Corporation Asynchronous serial communication system for delaying with software dwell time a receiving computer's acknowledgement in order for the transmitting computer to see the acknowledgement
US5544329A (en) * 1992-07-31 1996-08-06 Grumman Aerospace Corporation Interface system with memory map locations for holding flags indicating a priority for executing instructions held within messages received by the interface
US5293424A (en) * 1992-10-14 1994-03-08 Bull Hn Information Systems Inc. Secure memory card
WO1995024698A1 (en) * 1992-10-14 1995-09-14 Cp8 Transac A secure memory card
US5426736A (en) * 1993-05-26 1995-06-20 Digital Equipment Corporation Method and apparatus for processing input/output commands in a storage system having a command queue
FR2710766B1 (fr) * 1993-09-29 1995-12-01 Hyperparallel Technologies Système de transmission d'instructions de commandes intranodales ou de communications internodales dans un nÓoeud processeur.
EP0731945B1 (de) * 1993-12-01 2000-05-17 Marathon Technologies Corporation Fehler-betriebssichere/fehler tolerante computerbetriebsmethode
US5544304A (en) * 1994-03-25 1996-08-06 International Business Machines Corporation Fault tolerant command processing
US5638538A (en) * 1995-01-13 1997-06-10 Digital Equipment Corporation Turbotable: apparatus for directing address and commands between multiple consumers on a node coupled to a pipelined system bus
US5754866A (en) * 1995-05-08 1998-05-19 Nvidia Corporation Delayed interrupts with a FIFO in an improved input/output architecture
US5603051A (en) * 1995-06-06 1997-02-11 Hewlett-Packard Company Input/output processor with a local memory providing shared resources for a plurality of input/output interfaces on an I/O bus
US6226695B1 (en) 1995-09-29 2001-05-01 International Business Machines Corporation Information handling system including non-disruptive command and data movement between storage and one or more auxiliary processors
US5717954A (en) * 1995-10-13 1998-02-10 Compaq Computer Corporation Locked exchange FIFO
US5790397A (en) 1996-09-17 1998-08-04 Marathon Technologies Corporation Fault resilient/fault tolerant computing
US6304929B1 (en) 1997-05-13 2001-10-16 Micron Electronics, Inc. Method for hot swapping a programmable adapter by using a programmable processor to selectively disabling and enabling power thereto upon receiving respective control signals
US6138250A (en) * 1997-05-13 2000-10-24 Micron Electronics, Inc. System for reading system log
US6292905B1 (en) 1997-05-13 2001-09-18 Micron Technology, Inc. Method for providing a fault tolerant network using distributed server processes to remap clustered network resources to other servers during server failure
US6163849A (en) * 1997-05-13 2000-12-19 Micron Electronics, Inc. Method of powering up or powering down a server to a maintenance state
US6202111B1 (en) 1997-05-13 2001-03-13 Micron Electronics, Inc. Method for the hot add of a network adapter on a system including a statically loaded adapter driver
US6282673B1 (en) 1997-05-13 2001-08-28 Micron Technology, Inc. Method of recording information system events
US6418492B1 (en) 1997-05-13 2002-07-09 Micron Electronics Method for computer implemented hot-swap and hot-add
US5987554A (en) * 1997-05-13 1999-11-16 Micron Electronics, Inc. Method of controlling the transfer of information across an interface between two buses
US6195717B1 (en) 1997-05-13 2001-02-27 Micron Electronics, Inc. Method of expanding bus loading capacity
US6192434B1 (en) 1997-05-13 2001-02-20 Micron Electronics, Inc System for hot swapping a programmable adapter by using a programmable processor to selectively disabling and enabling power thereto upon receiving respective control signals
US6163853A (en) * 1997-05-13 2000-12-19 Micron Electronics, Inc. Method for communicating a software-generated pulse waveform between two servers in a network
US6189109B1 (en) 1997-05-13 2001-02-13 Micron Electronics, Inc. Method of remote access and control of environmental conditions
US6122746A (en) * 1997-05-13 2000-09-19 Micron Electronics, Inc. System for powering up and powering down a server
US6253334B1 (en) 1997-05-13 2001-06-26 Micron Electronics, Inc. Three bus server architecture with a legacy PCI bus and mirrored I/O PCI buses
US6269417B1 (en) 1997-05-13 2001-07-31 Micron Technology, Inc. Method for determining and displaying the physical slot number of an expansion bus device
US6073255A (en) * 1997-05-13 2000-06-06 Micron Electronics, Inc. Method of reading system log
US6179486B1 (en) 1997-05-13 2001-01-30 Micron Electronics, Inc. Method for hot add of a mass storage adapter on a system including a dynamically loaded adapter driver
US6170028B1 (en) 1997-05-13 2001-01-02 Micron Electronics, Inc. Method for hot swapping a programmable network adapter by using a programmable processor to selectively disabling and enabling power thereto upon receiving respective control signals
US6363497B1 (en) 1997-05-13 2002-03-26 Micron Technology, Inc. System for clustering software applications
US6247080B1 (en) 1997-05-13 2001-06-12 Micron Electronics, Inc. Method for the hot add of devices
US6269412B1 (en) 1997-05-13 2001-07-31 Micron Technology, Inc. Apparatus for recording information system events
US6249834B1 (en) 1997-05-13 2001-06-19 Micron Technology, Inc. System for expanding PCI bus loading capacity
US6324608B1 (en) * 1997-05-13 2001-11-27 Micron Electronics Method for hot swapping of network components
US5962933A (en) * 1997-05-13 1999-10-05 Micron Electronics, Inc. Computer fan speed control method
US5892928A (en) * 1997-05-13 1999-04-06 Micron Electronics, Inc. Method for the hot add of a network adapter on a system including a dynamically loaded adapter driver
US6249885B1 (en) 1997-05-13 2001-06-19 Karl S. Johnson Method for managing environmental conditions of a distributed processor system
US6145098A (en) 1997-05-13 2000-11-07 Micron Electronics, Inc. System for displaying system status
US6182180B1 (en) * 1997-05-13 2001-01-30 Micron Electronics, Inc. Apparatus for interfacing buses
US6134668A (en) * 1997-05-13 2000-10-17 Micron Electronics, Inc. Method of selective independent powering of portion of computer system through remote interface from remote interface power supply
US6134673A (en) * 1997-05-13 2000-10-17 Micron Electronics, Inc. Method for clustering software applications
US5990582A (en) * 1997-05-13 1999-11-23 Micron Electronics, Inc. Computer fan speed control device
US6247079B1 (en) * 1997-05-13 2001-06-12 Micron Electronics, Inc Apparatus for computer implemented hot-swap and hot-add
US6330690B1 (en) 1997-05-13 2001-12-11 Micron Electronics, Inc. Method of resetting a server
US6170067B1 (en) 1997-05-13 2001-01-02 Micron Technology, Inc. System for automatically reporting a system failure in a server
US6499073B1 (en) 1997-05-13 2002-12-24 Micron Electronics, Inc. System using programmable processor for selectively enabling or disabling power to adapter in response to respective request signals
US6243773B1 (en) 1997-05-13 2001-06-05 Micron Electronics, Inc. Configuration management system for hot adding and hot replacing devices
US6122758A (en) * 1997-05-13 2000-09-19 Micron Electronics, Inc. System for mapping environmental resources to memory for program access
US6219734B1 (en) 1997-05-13 2001-04-17 Micron Electronics, Inc. Method for the hot add of a mass storage adapter on a system including a statically loaded adapter driver
US6148355A (en) * 1997-05-13 2000-11-14 Micron Electronics, Inc. Configuration management method for hot adding and hot replacing devices
US6173346B1 (en) 1997-05-13 2001-01-09 Micron Electronics, Inc. Method for hot swapping a programmable storage adapter using a programmable processor for selectively enabling or disabling power to adapter slot in response to respective request signals
US6243838B1 (en) 1997-05-13 2001-06-05 Micron Electronics, Inc. Method for automatically reporting a system failure in a server
US6526333B1 (en) 1997-05-13 2003-02-25 Micron Technology, Inc. Computer fan speed control system method
US6202160B1 (en) 1997-05-13 2001-03-13 Micron Electronics, Inc. System for independent powering of a computer system
US6338150B1 (en) * 1997-05-13 2002-01-08 Micron Technology, Inc. Diagnostic and managing distributed processor system
US6249828B1 (en) 1997-05-13 2001-06-19 Micron Electronics, Inc. Method for the hot swap of a mass storage adapter on a system including a statically loaded adapter driver
US5896523A (en) * 1997-06-04 1999-04-20 Marathon Technologies Corporation Loosely-coupled, synchronized execution
US6009541A (en) * 1997-10-01 1999-12-28 Micron Electronics, Inc. Apparatus for performing an extensive diagnostic test in conjunction with a bios test routine
US6154835A (en) * 1997-10-01 2000-11-28 Micron Electronics, Inc. Method for automatically configuring and formatting a computer system and installing software
US6138179A (en) * 1997-10-01 2000-10-24 Micron Electronics, Inc. System for automatically partitioning and formatting a primary hard disk for installing software in which selection of extended partition size is not related to size of hard disk
US6035420A (en) * 1997-10-01 2000-03-07 Micron Electronics, Inc. Method of performing an extensive diagnostic test in conjunction with a bios test routine
US6199173B1 (en) 1997-10-01 2001-03-06 Micron Electronics, Inc. Method for mapping environmental resources to memory for program access
US6175490B1 (en) 1997-10-01 2001-01-16 Micron Electronics, Inc. Fault tolerant computer system
US6212585B1 (en) 1997-10-01 2001-04-03 Micron Electronics, Inc. Method of automatically configuring a server after hot add of a device
US6088816A (en) * 1997-10-01 2000-07-11 Micron Electronics, Inc. Method of displaying system status
US6263387B1 (en) 1997-10-01 2001-07-17 Micron Electronics, Inc. System for automatically configuring a server after hot add of a device
US6065053A (en) * 1997-10-01 2000-05-16 Micron Electronics, Inc. System for resetting a server
DE59809964D1 (de) * 1997-11-26 2003-11-27 Infineon Technologies Ag Verfahren und Vorrichtung zum Auslesen, Modifizieren und Überschreiben von in einer Speichereinrichtung gespeicherten Daten
US6298409B1 (en) 1998-03-26 2001-10-02 Micron Technology, Inc. System for data and interrupt posting for computer devices
US6421746B1 (en) 1998-03-26 2002-07-16 Micron Electronics, Inc. Method of data and interrupt posting for computer devices
US6456628B1 (en) * 1998-04-17 2002-09-24 Intelect Communications, Inc. DSP intercommunication network
US6223234B1 (en) 1998-07-17 2001-04-24 Micron Electronics, Inc. Apparatus for the hot swap and add of input/output platforms and devices
US6205503B1 (en) 1998-07-17 2001-03-20 Mallikarjunan Mahalingam Method for the hot swap and add of input/output platforms and devices
US6347337B1 (en) 1999-01-08 2002-02-12 Intel Corporation Credit based flow control scheme over virtual interface architecture for system area networks
US6457075B1 (en) * 1999-05-17 2002-09-24 Koninkijke Philips Electronics N.V. Synchronous memory system with automatic burst mode switching as a function of the selected bus master
US6564271B2 (en) 1999-06-09 2003-05-13 Qlogic Corporation Method and apparatus for automatically transferring I/O blocks between a host system and a host adapter
US7512724B1 (en) * 1999-11-19 2009-03-31 The United States Of America As Represented By The Secretary Of The Navy Multi-thread peripheral processing using dedicated peripheral bus
US7518993B1 (en) * 1999-11-19 2009-04-14 The United States Of America As Represented By The Secretary Of The Navy Prioritizing resource utilization in multi-thread computing system
US6792513B2 (en) * 1999-12-29 2004-09-14 The Johns Hopkins University System, method, and computer program product for high speed backplane messaging
AU2603901A (en) * 1999-12-29 2001-07-09 Johns Hopkins University, The System, method, and computer program product for high speed backplane messaging
GB2359906B (en) * 2000-02-29 2004-10-20 Virata Ltd Method and apparatus for DMA data transfer
US6735715B1 (en) 2000-04-13 2004-05-11 Stratus Technologies Bermuda Ltd. System and method for operating a SCSI bus with redundant SCSI adaptors
US6708283B1 (en) 2000-04-13 2004-03-16 Stratus Technologies, Bermuda Ltd. System and method for operating a system with redundant peripheral bus controllers
US6633996B1 (en) 2000-04-13 2003-10-14 Stratus Technologies Bermuda Ltd. Fault-tolerant maintenance bus architecture
US6820213B1 (en) 2000-04-13 2004-11-16 Stratus Technologies Bermuda, Ltd. Fault-tolerant computer system with voter delay buffer
US6687851B1 (en) 2000-04-13 2004-02-03 Stratus Technologies Bermuda Ltd. Method and system for upgrading fault-tolerant systems
US6691257B1 (en) 2000-04-13 2004-02-10 Stratus Technologies Bermuda Ltd. Fault-tolerant maintenance bus protocol and method for using the same
PL206316B1 (pl) * 2000-05-13 2010-07-30 Smithkline Beecham Plcsmithkline Beecham Plc Sposób wytwarzania klawulanianu potasu
US6948010B2 (en) 2000-12-20 2005-09-20 Stratus Technologies Bermuda Ltd. Method and apparatus for efficiently moving portions of a memory block
US7076536B2 (en) 2000-12-21 2006-07-11 Microsoft Corporation Method and system to access software pertinent to an electronic peripheral device at an address based on a peripheral device identifier
US7165109B2 (en) * 2001-01-12 2007-01-16 Microsoft Corporation Method and system to access software pertinent to an electronic peripheral device based on an address stored in a peripheral device
US6766479B2 (en) 2001-02-28 2004-07-20 Stratus Technologies Bermuda, Ltd. Apparatus and methods for identifying bus protocol violations
US7065672B2 (en) * 2001-03-28 2006-06-20 Stratus Technologies Bermuda Ltd. Apparatus and methods for fault-tolerant computing using a switching fabric
US6971043B2 (en) * 2001-04-11 2005-11-29 Stratus Technologies Bermuda Ltd Apparatus and method for accessing a mass storage device in a fault-tolerant server
US6996750B2 (en) * 2001-05-31 2006-02-07 Stratus Technologies Bermuda Ltd. Methods and apparatus for computer bus error termination
US7072299B2 (en) * 2001-08-20 2006-07-04 International Business Machines Corporation Credit-based receiver using selected transmit rates and storage thresholds for preventing under flow and over flow-methods, apparatus and program products
DE60213616T2 (de) 2001-08-24 2007-08-09 Intel Corporation, Santa Clara Eine allgemeine eingabe-/ausgabearchitektur, protokoll und entsprechende verfahren zur umsetzung der flusssteuerung
US9836424B2 (en) 2001-08-24 2017-12-05 Intel Corporation General input/output architecture, protocol and related methods to implement flow control
US7171509B2 (en) * 2002-01-09 2007-01-30 International Business Machines Corporation Method and apparatus for host messaging unit for Peripheral Component Interconnect busmaster devices
US7230929B2 (en) * 2002-07-22 2007-06-12 Qlogic, Corporation Method and system for dynamically assigning domain identification in a multi-module fibre channel switch
US7154886B2 (en) * 2002-07-22 2006-12-26 Qlogic Corporation Method and system for primary blade selection in a multi-module fiber channel switch
US7397768B1 (en) 2002-09-11 2008-07-08 Qlogic, Corporation Zone management in a multi-module fibre channel switch
JP2004171411A (ja) * 2002-11-21 2004-06-17 Hitachi Global Storage Technologies Netherlands Bv データ記憶装置及びバッファメモリの管理方法
US7319669B1 (en) 2002-11-22 2008-01-15 Qlogic, Corporation Method and system for controlling packet flow in networks
US6996639B2 (en) * 2002-12-10 2006-02-07 Intel Corporation Configurably prefetching head-of-queue from ring buffers
US7876703B2 (en) * 2003-06-13 2011-01-25 International Business Machines Corporation System and method for enabling connection among devices in a network
US7646767B2 (en) * 2003-07-21 2010-01-12 Qlogic, Corporation Method and system for programmable data dependant network routing
US7234101B1 (en) 2003-08-27 2007-06-19 Qlogic, Corporation Method and system for providing data integrity in storage systems
US7219263B1 (en) 2003-10-29 2007-05-15 Qlogic, Corporation Method and system for minimizing memory corruption
US20050154573A1 (en) * 2004-01-08 2005-07-14 Maly John W. Systems and methods for initializing a lockstep mode test case simulation of a multi-core processor design
US7099995B2 (en) * 2004-02-17 2006-08-29 International Business Machines Corporation Metadata access during error handling routines
US20050240727A1 (en) * 2004-04-23 2005-10-27 Shishir Shah Method and system for managing storage area networks
US7930377B2 (en) 2004-04-23 2011-04-19 Qlogic, Corporation Method and system for using boot servers in networks
US7669190B2 (en) 2004-05-18 2010-02-23 Qlogic, Corporation Method and system for efficiently recording processor events in host bus adapters
US7937499B1 (en) * 2004-07-09 2011-05-03 Oracle America, Inc. Methods and apparatus for dynamically switching between polling and interrupt mode for a ring buffer of a network interface card
US7577772B2 (en) * 2004-09-08 2009-08-18 Qlogic, Corporation Method and system for optimizing DMA channel selection
US7975064B2 (en) * 2004-09-16 2011-07-05 International Business Machines Corporation Envelope packet architecture for broadband engine
US20060064531A1 (en) * 2004-09-23 2006-03-23 Alston Jerald K Method and system for optimizing data transfer in networks
US7676611B2 (en) * 2004-10-01 2010-03-09 Qlogic, Corporation Method and system for processing out of orders frames
US7380030B2 (en) * 2004-10-01 2008-05-27 Qlogic, Corp. Method and system for using an in-line credit extender with a host bus adapter
US7398335B2 (en) 2004-11-22 2008-07-08 Qlogic, Corporation Method and system for DMA optimization in host bus adapters
US7721033B2 (en) * 2004-12-03 2010-05-18 Emulex Design & Manufacturing Corporation Interrupt notification block
US7164425B2 (en) * 2004-12-21 2007-01-16 Qlogic Corporation Method and system for high speed network application
US7392437B2 (en) * 2005-01-20 2008-06-24 Qlogic, Corporation Method and system for testing host bus adapters
US8510491B1 (en) * 2005-04-05 2013-08-13 Oracle America, Inc. Method and apparatus for efficient interrupt event notification for a scalable input/output device
US7281077B2 (en) * 2005-04-06 2007-10-09 Qlogic, Corporation Elastic buffer module for PCI express devices
US7231480B2 (en) * 2005-04-06 2007-06-12 Qlogic, Corporation Method and system for receiver detection in PCI-Express devices
US7461195B1 (en) 2006-03-17 2008-12-02 Qlogic, Corporation Method and system for dynamically adjusting data transfer rates in PCI-express devices
US7716397B2 (en) * 2007-07-03 2010-05-11 Lsi Corporation Methods and systems for interprocessor message exchange between devices using only write bus transactions
US8473647B2 (en) * 2007-09-17 2013-06-25 Apple Inc. Methods and apparatus for decreasing power consumption and bus activity
WO2010021120A1 (ja) * 2008-08-20 2010-02-25 パナソニック株式会社 通信装置、及び通信制御方法
US8433845B2 (en) * 2009-04-08 2013-04-30 Google Inc. Data storage device which serializes memory device ready/busy signals
US20100262979A1 (en) * 2009-04-08 2010-10-14 Google Inc. Circular command queues for communication between a host and a data storage device
US20100262773A1 (en) * 2009-04-08 2010-10-14 Google Inc. Data striping in a flash memory data storage device
TWI465905B (zh) * 2010-09-22 2014-12-21 Toshiba Kk 記憶體系統、主機控制器、及直接記憶體存取之控制方法
US8942337B2 (en) 2012-04-25 2015-01-27 Medtronic, Inc. Systems and methods for handling race conditions during data transfer in an implantable medical device
US9265953B2 (en) 2012-04-25 2016-02-23 Medtronic, Inc. Handling race conditions during data transfer between multiple modules of an electronic device
US9288163B2 (en) 2013-03-15 2016-03-15 Avago Technologies General Ip (Singapore) Pte. Ltd. Low-latency packet receive method for networking devices
US9892065B2 (en) * 2015-05-20 2018-02-13 International Business Machines Corporation Adjustments of buffer credits for optimizing the number of retry operations and transfer ready operations
US10061734B2 (en) 2015-05-20 2018-08-28 International Business Machines Corporation Adjustment of buffer credits and other parameters in a startup phase of communications between a plurality of channels and a control unit
US9864716B2 (en) 2015-05-20 2018-01-09 International Business Machines Corporation Receiving buffer credits by a plurality of channels of one or more host computational devices for transmitting data to a control unit
US11436367B2 (en) 2020-02-25 2022-09-06 Hewlett Packard Enterprise Development Lp Pre-operating system environment-based sanitization of storage devices
CN115588442B (zh) * 2022-12-12 2023-04-14 合肥康芯威存储技术有限公司 一种存储装置及其供电方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3886525A (en) * 1973-06-29 1975-05-27 Ibm Shared data controlled by a plurality of users
FR2246023B1 (de) * 1973-09-05 1976-10-01 Honeywell Bull Soc Ind
US4318174A (en) * 1975-12-04 1982-03-02 Tokyo Shibaura Electric Co., Ltd. Multi-processor system employing job-swapping between different priority processors
JPS5296836A (en) * 1976-02-10 1977-08-15 Toshiba Corp Multiplex data processing system
US4212057A (en) * 1976-04-22 1980-07-08 General Electric Company Shared memory multi-microprocessor computer system
US4038642A (en) * 1976-04-30 1977-07-26 International Business Machines Corporation Input/output interface logic for concurrent operations
US4181937A (en) * 1976-11-10 1980-01-01 Fujitsu Limited Data processing system having an intermediate buffer memory
JPS5363833A (en) * 1976-11-18 1978-06-07 Nippon Telegr & Teleph Corp <Ntt> Cyclic buffer receiving system
JPS5384658A (en) * 1976-12-30 1978-07-26 Fujitsu Ltd Processing system for inter-processor communication
US4110823A (en) * 1977-02-17 1978-08-29 Xerox Corporation Soft display word processing system with multiple autonomous processors
JPS547252A (en) * 1977-06-20 1979-01-19 Hitachi Ltd Program control system
US4145739A (en) * 1977-06-20 1979-03-20 Wang Laboratories, Inc. Distributed data processing system
US4204251A (en) * 1977-12-28 1980-05-20 Finn Brudevold Interconnection unit for multiple data processing systems
US4195351A (en) * 1978-01-27 1980-03-25 International Business Machines Corporation Loop configured data transmission system
JPS597987B2 (ja) * 1978-02-01 1984-02-22 松下電器産業株式会社 演算制御素子間のデ−タ伝送制御方式
US4187394A (en) * 1978-04-25 1980-02-05 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration High-speed data link for moderate distances and noisy environments
US4237534A (en) * 1978-11-13 1980-12-02 Motorola, Inc. Bus arbiter
US4227244A (en) * 1978-11-30 1980-10-07 Sperry Corporation Closed loop address
US4268907A (en) * 1979-01-22 1981-05-19 Honeywell Information Systems Inc. Cache unit bypass apparatus
US4245306A (en) * 1978-12-21 1981-01-13 Burroughs Corporation Selection of addressed processor in a multi-processor network
US4282572A (en) * 1979-01-15 1981-08-04 Ncr Corporation Multiprocessor memory access system
IT1118355B (it) * 1979-02-15 1986-02-24 Cselt Centro Studi Lab Telecom Sistema di interconnessione tra processori
US4445176A (en) * 1979-12-28 1984-04-24 International Business Machines Corporation Block transfers of information in data processing networks
US4335426A (en) * 1980-03-10 1982-06-15 International Business Machines Corporation Remote processor initialization in a multi-station peer-to-peer intercommunication system

Also Published As

Publication number Publication date
EP0077008A3 (en) 1985-12-04
EP0077008B1 (de) 1990-12-27
EP0304540A3 (en) 1989-08-23
US4449182A (en) 1984-05-15
EP0304540A2 (de) 1989-03-01
EP0304540B1 (de) 1994-04-20
DE3280451D1 (de) 1994-05-26
EP0077008A2 (de) 1983-04-20
CA1183273A (en) 1985-02-26
JPS58501740A (ja) 1983-10-13
US4449182B1 (de) 1989-12-12
DE3280286D1 (de) 1991-02-07
WO1983001326A1 (en) 1983-04-14

Similar Documents

Publication Publication Date Title
DE3280451T2 (de) Verfahren zur Initialisierung eines Datenverarbeitungssystems.
DE3482430D1 (de) Verfahren zur musterbearbeitung.
DE3750188D1 (de) Verfahren zur In-Linie Implementierung einer Vorstellung in einem Informationsverarbeitungssystem.
DE3788240T2 (de) Verfahren zur Selbstkonfigurierung von Endgeräten in einem Datenverarbeitungssystem.
DE3686307T2 (de) Verfahren zur rotierung eines binaeren bildes.
DE3484804D1 (de) Verfahren zur entdeckung eines strahlungsbildes.
DE3482543D1 (de) Verfahren zur bildverarbeitung.
DE3650129D1 (de) Verfahren zur Kantenglättung für Rechnerbilderzeugungssystem.
DE3587996D1 (de) Verfahren zur Bereitstellung einer &#34;On-line&#34;-Hilfestellung für interaktive Datenverarbeitungsanlagen.
DE2967699D1 (de) Verfahren zur verarbeitung von bilddaten.
DE3783193T2 (de) Verfahren oder system zur verarbeitung von bilddaten.
DE3381881D1 (de) Verfahren zur dynamischen rekonfiguration eines datenverarbeitungssystems bei hinzufuegung von einrichtungen.
DE3483651D1 (de) Verfahren zur lokalisierung von gegenstaenden eines sachregisters.
DE68909461D1 (de) Verfahren zur seismischen datenverarbeitung.
DE3851207D1 (de) Verfahren zur Bedienung eines Rechnergraphiksystems.
DE3685391D1 (de) Verfahren zur kommunikation mit ferneinheiten eines verteilten datenverarbeitungssystems.
DE3485064D1 (de) Verfahren zur abtrennung eines chlortoluolisomers.
ATE52892T1 (de) Verfahren zur herstellung eines gewuerzes.
DE3688187D1 (de) Verfahren zur bearbeitung eines gebietes.
DE3786546T2 (de) Verfahren zur berechnung eines normalvektors.
DE3280052D1 (de) Verfahren und vorrichtung zur fehlerkorrektur in einer datenverarbeitungsanlage.
DE58903650D1 (de) Verfahren zur interruptverarbeitung in einer datentverarbeitungsanlage.
DE3484923D1 (de) Verfahren zur reinigung eines kautschuks.
DE3688745D1 (de) Verfahren zur aufbereitung numerischer daten.
DE2967696D1 (de) Verfahren zur bilddatenverarbeitung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee