CN103616937A - Mainboard, PCIE network card and server system - Google Patents
Mainboard, PCIE network card and server system Download PDFInfo
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- CN103616937A CN103616937A CN201310616581.7A CN201310616581A CN103616937A CN 103616937 A CN103616937 A CN 103616937A CN 201310616581 A CN201310616581 A CN 201310616581A CN 103616937 A CN103616937 A CN 103616937A
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Abstract
The invention discloses a mainboard, a PCIE network card and a server system. According to the mainboard, the PCIE network card and the server system, a part of pins used for transmitting auxiliary signals in a PCIE standard slot are connected with a chip in a BMC system to reuse and transmit NCSI signals to further achieve communication between the BMC system and the PCIE network card, and then the PCIE network card with the NCSI function can be realized on the PCIE standard slot without extra arrangement of cables and cable connectors or complicated manufacturing and installing processes, and the problems existing in the prior art that manufacturing and installation are complicated and cost is too high are solved.
Description
Technical field
Network controller sideband interface (Network Controller Sideband Interface, the NCSI) technical field that the present invention relates to back-level server outband management, especially relates to a kind of mainboard, PCIE network interface card and server system.
Background technology
In server system, generally include processor system and baseboard management controller (Baseboard Management Controller, BMC) system, wherein, processor system and interface thereof are the interior systems of the band of processing business, its interface is called band inner joint; BMC system and interface thereof are the band external systems of realizing system monitoring management, and its interface is called band external tapping.Band inner joint and band external tapping are all Ethernet interface conventionally.
In tradition application, in band, Ethernet interface and out-of-band ethernet interface are independently to separate, as shown in Figure 1, processor system high-speed peripheral device interconnection (the Peripheral Component Interconnect Express that goes out, PCIE) bus, upper by being with interior Ethernet interface to be connected to ethernet controller in band (being called for short PCIE network interface card), the in-band information of transmission processor system; BMC system monitoring to band external information by out-of-band ethernet interface, transmit.
At present in order to simplify networking, a kind of network controller sideband interface (Network Controller Sideband Interface of back-level server outband management is proposed in prior art, NCSI) technology, as shown in Figure 2, in this NCSI technology, the BMC system NCSI bus of going out, be connected on PCIE network interface card, and by the network interface correspondence with foreign country of PCIE network interface card, and do not conflict mutually with the in-band communications of this network interface, make to be with interior Ethernet interface and out-of-band ethernet interface to unite two into one, in the cost-effective while, simplified again networking.
At present, in order to make this server system, realize above-mentioned NCSI technology, existing solution is all to reserve wire and cable connector on mainboard in server system and PCIE network interface card, after PCIE network interface card inserts PCIE standard sockets, by cable, the NCSI signal in BMC system in mainboard is accessed to PCIE network interface card.That is to say, in order to make PCIE network interface card can realize NCSI function, need extra two wire and cable connectors and the single line cable of increasing, it is loaded down with trivial details that this method exists the manufacturing to install, and increases the defect of material and process and assemble cost.
Summary of the invention
The embodiment of the present invention provides a kind of mainboard, PCIE network interface card and server system, in order to solve in prior art the manufacturing existing when PCIE network interface card is realized NCSI function install loaded down with trivial details, the problem of high cost.
First aspect, provides a kind of mainboard, comprising:
Processor system, baseboard management controller BMC system with for being connected the PCIE standard sockets of high-speed peripheral device interconnection Bus PC IE network interface card, wherein:
The pin that transmits non-auxiliary signal in described PCIE standard sockets is connected with the chip in described processor system, to realize the communication between described processor system and described PCIE network interface card;
The pin that transmits auxiliary signal in described PCIE standard sockets is connected with the chip in described BMC system, the network controller sideband interface NCSI signal of multiplexing transmission back-level server outband management, to realize the communication between described BMC system and described PCIE network interface card.
In conjunction with first aspect, in the possible implementation of the first, described auxiliary signal comprises:
Retain RSVD signal, at least one in JTAG signal and systems management bus SMBus signal organized in joint test behavior, wherein:
Described SMBus signal comprises: at least one in SMBus data SMDAT signal and SMBus clock SMCLK signal;
Described JTAG signal comprises: jtag test reset TRST signal, jtag test clock input tck signal, jtag test data input TDI signal, at least one in jtag test data output TDO signal and jtag test test selection tms signal.
In conjunction with the possible implementation of the first of first aspect, in the possible implementation of the second, in the pin of described transmission auxiliary signal, do not comprise the pin that transmits described JTAG TRST signal, and the pin that transmits described JTAG TRST signal is by the drop-down processing of resistance ground connection.
In the possible implementation of the second of the possible implementation of the first of first aspect, first aspect or first aspect, described NCSI signal comprises:
Reference input clock signal REF_CLK, receive data useful signal CRS_DV, first receives data-signal RXD[1], second receives data-signal RXD[0], send enable signal TX_EN, first sends data-signal TXD[1] and the second transmission data-signal TXD[0] at least one.
Second aspect, provides a kind of high-speed peripheral device interconnection Bus PC IE network interface card, comprises the interface being connected with PCIE standard sockets on mainboard, wherein:
The interface corresponding with the pin that transmits non-auxiliary signal in described PCIE standard sockets, be used for transmitting non-auxiliary signal, the interface corresponding with the pin that transmits auxiliary signal in described PCIE standard sockets, for the network controller sideband interface NCSI signal of multiplexing transmission back-level server outband management, to realize the communication between described PCIE standard sockets and described PCIE network interface card.
The third aspect, provides a kind of server system, comprises mainboard described in above-mentioned any one and PCIE network interface card described above.
In the embodiment of the present invention, by the part pin that transmits auxiliary signal in PCIE standard sockets is connected with the chip in BMC system, multiplexing transmission NCSI signal, realize the communication between BMC system and PCIE network interface card, thereby do not need additionally to increase cable, wire and cable connector and loaded down with trivial details manufacturing installation process, just can in PCIE standard sockets, realize the PCIE network interface card of supporting NCSI function, the manufacturing of having avoided existing in prior art is installed loaded down with trivial details, the problem of high cost.
Accompanying drawing explanation
Fig. 1 is the application schematic diagram of server system in prior art;
Fig. 2 is the application schematic diagram that in prior art, server system is realized NCSI technology;
The structural representation of a kind of server system that Fig. 3 provides for the embodiment of the present invention;
A kind of server system that Fig. 4 provides for the embodiment of the present invention is realized the application schematic diagram of NCSI technology.
Embodiment
For solve in prior art the manufacturing existing when PCIE network interface card is realized NCSI function install loaded down with trivial details, the problem of high cost, the embodiment of the present invention provides a kind of mainboard, PCIE network interface card and server system.In this technical scheme, by the part pin that transmits auxiliary signal in PCIE standard sockets is connected with the chip in BMC system, multiplexing transmission NCSI signal, realize the communication between BMC system and PCIE network interface card, thereby do not need additionally to increase cable, wire and cable connector and loaded down with trivial details manufacturing installation process, just can in PCIE standard sockets, realize the PCIE network interface card of supporting NCSI function, the manufacturing of having avoided existing in prior art is installed loaded down with trivial details, the problem of high cost.
Below in conjunction with Figure of description, embodiments of the invention are described, should be appreciated that embodiment described herein, only for description and interpretation the present invention, is not limited to the present invention.And in the situation that not conflicting, the embodiment in this explanation and the feature of embodiment can be interosculated.
The embodiment of the present invention provides a kind of mainboard, and this mainboard mainly comprises: processor system, baseboard management controller BMC system with for being connected the PCIE standard sockets of high-speed peripheral device interconnection Bus PC IE network interface card, wherein:
The pin that transmits non-auxiliary signal in PCIE standard sockets is connected with the chip in processor system, to realize the communication between processor system and PCIE network interface card;
The pin that transmits auxiliary signal in PCIE standard sockets is connected with the chip in BMC system, and multiplexing transmission NCSI signal, to realize the communication between BMC system and PCIE network interface card.
Wherein, auxiliary signal can comprise at least one of following signal:
Retain RSVD signal, JTAG signal and systems management bus SMBus signal is organized in joint test behavior, and SMBus signal can specifically comprise at least one in following signal: SMBus data SMDAT signal and SMBus clock SMCLK signal; JTAG signal can specifically comprise at least one in following signal: jtag test reset TRST signal, jtag test clock input tck signal, jtag test data input TDI signal, jtag test data output TDO signal and jtag test test selection tms signal.
Above-mentioned NCSI signal can specifically comprise at least one in following signal: reference input clock signal REF_CLK, receive data useful signal CRS_DV, first receives data-signal RXD[1], second receives data-signal RXD[0], send enable signal TX_EN, first sends data-signal TXD[1] and the second transmission data-signal TXD[0].
It should be noted that, in the embodiment of the present invention, can be, but not limited to above-mentioned seven kinds of NCSI signals, because above-mentioned seven kinds of NCSI signals can meet most application scenarioss, so in the embodiment of the present invention, preferentially select this seven kinds of NCSI signals.
In addition, because PCIE standard sockets is according to the difference of bus bit wide and all differences, can be divided into X1, X4, X8 and X16 type, under above-mentioned every type, all there is the pin of RSVD signal, therefore for the PCIE network interface card of PCIE X1 type that can compatible bus bit wide minimum, when selecting the pin multiplexing transmission NCSI signal of RSVD signal, can preferentially select the pin of two RSVD signals under X1 type to carry out multiplexing.According to user's needs, also can multiplexing X4, X8 or X16 type under other auxiliary signals, as RSVD signal.
Simultaneously, in order to make the PCIE network interface card that PCIE standard sockets can either the compatible NCSI of support signal, again can compatible with PCI E standard network interface card, do not support the PCIE network interface card of NCSI signal, PCIE standard network interface card can be worked, when selecting the pin of multiplexing transmission NCSI signal, do not advise selecting the pin of JTAG TRST signal, can be by the pin of transmission JTAG TRST signal by the drop-down processing of resistance ground connection, make PCIE standard network interface card cannot enter JTAG mode of operation, thereby avoid the issuable operation irregularity of PCIE standard network interface card.It should be noted that, when not selecting the pin multiplexing transmission NCSI signal of JTAG signal, can the pin of JTAG TRST signal not done to the drop-down processing of resistance.
Concrete, the pin of transmission auxiliary signal is connected with the chip in BMC system, during multiplexing transmission NCSI signal, multiplexing relation between the auxiliary signal of selecting and NCSI signal can be arranged in pairs or groups arbitrarily, such as the auxiliary signal of selecting comprises: RSVD1 signal, RSVD2 signal, JTAG tck signal, JTAG TDI signal, JTAG TDO signal, JTAG tms signal and SMBus SMDAT signal, and the NCSI signal of selecting comprises: REF_CLK, CRS_DV, RXD[0], RXD[1], TX_EN, TXD[0] and TXD[1], multiplexing relation between them can be so: the multiplexing RSVD1 signal of REF_CLK, the multiplexing RSVD2 signal of CRS_DV, RXD[0] multiplexing JTAG tck signal, RXD[1] multiplexing JTAGTDI signal, the multiplexing JTAG TDO of TX_EN signal, TXD[0] multiplexing JTAG tms signal, TXD[1] multiplexing SMBus SMDAT signal.
Accordingly, the embodiment of the present invention also provides a kind of PCIE network interface card, this PCIE network interface card comprises the interface being connected with PCIE standard sockets on mainboard, wherein, the interface corresponding with the pin that transmits non-auxiliary signal in PCIE standard sockets, for transmitting non-auxiliary signal, the interface corresponding with the pin that transmits auxiliary signal in PCIE standard sockets, for multiplexing transmission NCSI signal, to realize the communication between PCIE standard sockets and PCIE network interface card.
Based on foregoing invention design, the embodiment of the present invention has also proposed a kind of server system, as shown in Figure 3, is the structural representation of this server system, comprises mainboard 31 and PCIE network interface card 32 in above-described embodiment,
This server system being realized to NCSI technology below describes.As shown in Figure 4, for this server system, realize the application schematic diagram of the application schematic diagram of NCSI technology.
The pin that transmits non-auxiliary signal in PCIE standard sockets 313 is connected with the chip in processor system 311, to realize the communication between processor system 311 and PCIE network interface card 32;
The pin that transmits auxiliary signal in PCIE standard sockets 313 is connected with the chip in BMC system 312, and multiplexing transmission NCSI signal, to realize the communication between BMC system 312 and PCIE network interface card 32;
PCIE network interface card 32, comprises the interface being connected with PCIE standard sockets 313 on mainboard 31, wherein:
The interface corresponding with the pin that transmits non-auxiliary signal in PCIE standard sockets 313, be used for transmitting non-auxiliary signal, the interface corresponding with the pin that transmits auxiliary signal in PCIE standard sockets 313, for multiplexing transmission NCSI signal, to realize the communication between PCIE standard sockets 313 and PCIE network interface card 32.
It will be understood by those skilled in the art that embodiments of the invention can be provided as method, device (equipment) or computer program.Therefore, the present invention can adopt complete hardware implementation example, implement software example or in conjunction with the form of the embodiment of software and hardware aspect completely.And the present invention can adopt the form that wherein includes the upper computer program of implementing of computer-usable storage medium (including but not limited to magnetic disk memory, CD-ROM, optical memory etc.) of computer usable program code one or more.
The present invention is with reference to describing according to process flow diagram and/or the block scheme of the method for the embodiment of the present invention, device (equipment) and computer program.Should understand can be in computer program instructions realization flow figure and/or block scheme each flow process and/or the flow process in square frame and process flow diagram and/or block scheme and/or the combination of square frame.Can provide these computer program instructions to the processor of multi-purpose computer, special purpose computer, Embedded Processor or other programmable data processing device to produce a machine, the instruction of carrying out by the processor of computing machine or other programmable data processing device is produced for realizing the device in the function of flow process of process flow diagram or a plurality of flow process and/or square frame of block scheme or a plurality of square frame appointments.
These computer program instructions also can be stored in energy vectoring computer or the computer-readable memory of other programmable data processing device with ad hoc fashion work, the instruction that makes to be stored in this computer-readable memory produces the manufacture that comprises command device, and this command device is realized the function of appointment in flow process of process flow diagram or a plurality of flow process and/or square frame of block scheme or a plurality of square frame.
These computer program instructions also can be loaded in computing machine or other programmable data processing device, make to carry out sequence of operations step to produce computer implemented processing on computing machine or other programmable devices, thereby the instruction of carrying out is provided for realizing the step of the function of appointment in flow process of process flow diagram or a plurality of flow process and/or square frame of block scheme or a plurality of square frame on computing machine or other programmable devices.
Although described the preferred embodiments of the present invention, once those skilled in the art obtain the basic creative concept of cicada, can make other change and modification to these embodiment.So claims are intended to all changes and the modification that are interpreted as comprising preferred embodiment and fall into the scope of the invention.
Obviously, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention the present invention.Like this, if within of the present invention these are revised and modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to comprise these changes and modification interior.
Claims (9)
1. a mainboard, is characterized in that, comprising: processor system, baseboard management controller BMC system with for being connected the PCIE standard sockets of high-speed peripheral device interconnection Bus PC IE network interface card, wherein:
The pin that transmits non-auxiliary signal in described PCIE standard sockets is connected with the chip in described processor system, to realize the communication between described processor system and described PCIE network interface card;
The pin that transmits auxiliary signal in described PCIE standard sockets is connected with the chip in described BMC system, the network controller sideband interface NCSI signal of multiplexing transmission back-level server outband management, to realize the communication between described BMC system and described PCIE network interface card.
2. mainboard as claimed in claim 1, is characterized in that, described auxiliary signal comprises:
Retain RSVD signal, at least one in JTAG signal and systems management bus SMBus signal organized in joint test behavior, wherein:
Described SMBus signal comprises: at least one in SMBus data SMDAT signal and SMBus clock SMCLK signal;
Described JTAG signal comprises: jtag test reset TRST signal, jtag test clock input tck signal, jtag test data input TDI signal, at least one in jtag test data output TDO signal and jtag test test selection tms signal.
3. mainboard as claimed in claim 2, is characterized in that, does not comprise the pin that transmits described JTAG TRST signal in the pin of described transmission auxiliary signal, and the pin that transmits described JTAG TRST signal is by the drop-down processing of resistance ground connection.
4. the mainboard as described in as arbitrary in claim 1～3, is characterized in that, described NCSI signal comprises:
Reference input clock signal REF_CLK, receive data useful signal CRS_DV, first receives data-signal RXD[1], second receives data-signal RXD[0], send enable signal TX_EN, first sends data-signal TXD[1] and the second transmission data-signal TXD[0] at least one.
5. a high-speed peripheral device interconnection Bus PC IE network interface card, comprises the interface being connected with PCIE standard sockets on mainboard, it is characterized in that, wherein:
The interface corresponding with the pin that transmits non-auxiliary signal in described PCIE standard sockets, be used for transmitting non-auxiliary signal, the interface corresponding with the pin that transmits auxiliary signal in described PCIE standard sockets, for the network controller sideband interface NCSI signal of multiplexing transmission back-level server outband management, to realize the communication between described PCIE standard sockets and described PCIE network interface card.
6. a server system, is characterized in that, comprises mainboard and high-speed peripheral device interconnection Bus PC IE network interface card, wherein:
Described mainboard, comprise processor system, baseboard management controller BMC system with for being connected the PCIE standard sockets of described PCIE network interface card, wherein: the pin that transmits non-auxiliary signal in described PCIE standard sockets is connected with the chip in described processor system, to realize the communication between described processor system and described PCIE network interface card; The pin that transmits auxiliary signal in described PCIE standard sockets is connected with the chip in described BMC system, the network controller sideband interface NCSI signal of multiplexing transmission back-level server outband management, to realize the communication between described BMC system and described PCIE network interface card;
Described PCIE network interface card, comprise the interface being connected with described PCIE standard sockets, wherein: the interface corresponding with the pin that transmits non-auxiliary signal in described PCIE standard sockets, be used for transmitting non-auxiliary signal, the interface corresponding with the pin that transmits auxiliary signal in described PCIE standard sockets, for the network controller sideband interface NCSI signal of multiplexing transmission back-level server outband management, to realize the communication between described PCIE standard sockets and described PCIE network interface card.
7. system as claimed in claim 6, is characterized in that, described auxiliary signal comprises:
Retain RSVD signal, at least one in JTAG signal and systems management bus SMBus signal organized in joint test behavior, wherein:
Described SMBus signal comprises: at least one in SMBus data SMDAT signal and SMBus clock SMCLK signal;
Described JTAG signal comprises: jtag test reset TRST signal, jtag test clock input tck signal, jtag test data input TDI signal, at least one in jtag test data output TDO signal and jtag test test selection tms signal.
8. system as claimed in claim 7, is characterized in that, does not comprise the pin that transmits described JTAG TRST signal in the pin of described transmission auxiliary signal, and the pin that transmits described JTAG TRST signal is by the drop-down processing of resistance ground connection.
9. the system as described in as arbitrary in claim 6～8, is characterized in that, described NCSI signal comprises:
Reference input clock signal REF_CLK, receive data useful signal CRS_DV, first receives data-signal RXD[1], second receives data-signal RXD[0], send enable signal TX_EN, first sends data-signal TXD[1] and the second transmission data-signal TXD[0] at least one.
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| CN103984391A (en) * | 2014-05-29 | 2014-08-13 | 浪潮电子信息产业股份有限公司 | High density and high bandwidth server main board |
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| WO2016037504A1 (en) * | 2014-09-10 | 2016-03-17 | 华为技术有限公司 | Unified server communication method, baseboard management controller and server |
| CN105791052A (en) * | 2016-04-01 | 2016-07-20 | 浪潮电子信息产业股份有限公司 | Method of batch-testing network cards with NCSI function |
| CN105897471A (en) * | 2016-04-05 | 2016-08-24 | 浪潮电子信息产业股份有限公司 | Out-of-band management system and out-of-band management method |
| CN106126394A (en) * | 2016-08-22 | 2016-11-16 | 浪潮(北京)电子信息产业有限公司 | Out of band supervision management obtains the method and system of PCIE device assets information |
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| CN108009114A (en) * | 2017-12-08 | 2018-05-08 | 郑州云海信息技术有限公司 | A kind of isometric structure of optimization NCSI clock cables |
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| WO2016037504A1 (en) * | 2014-09-10 | 2016-03-17 | 华为技术有限公司 | Unified server communication method, baseboard management controller and server |
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| CN107888222B (en) * | 2017-11-16 | 2020-08-25 | 苏州浪潮智能科技有限公司 | Circuit structure and method for optimizing NCSI signal quality |
| CN108009114A (en) * | 2017-12-08 | 2018-05-08 | 郑州云海信息技术有限公司 | A kind of isometric structure of optimization NCSI clock cables |
| CN108009114B (en) * | 2017-12-08 | 2020-09-29 | 苏州浪潮智能科技有限公司 | Structure for optimizing equal length of NCSI clock signal line |
| CN108429741A (en) * | 2018-02-28 | 2018-08-21 | 郑州云海信息技术有限公司 | A kind of method and system for realizing NCSI agreements |
| CN109408432A (en) * | 2018-09-04 | 2019-03-01 | 深圳市宝德计算机系统有限公司 | A kind of buckle for supporting NCSI |
| CN109828933A (en) * | 2019-01-30 | 2019-05-31 | 郑州云海信息技术有限公司 | A kind of implementation method of the NCSI function of NCSI function network interface card and network interface card |
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