CN103049380A - VBIOS (video basic input output system) debugging method for special display controller - Google Patents

VBIOS (video basic input output system) debugging method for special display controller Download PDF

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Publication number
CN103049380A
CN103049380A CN2012105617009A CN201210561700A CN103049380A CN 103049380 A CN103049380 A CN 103049380A CN 2012105617009 A CN2012105617009 A CN 2012105617009A CN 201210561700 A CN201210561700 A CN 201210561700A CN 103049380 A CN103049380 A CN 103049380A
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vbios
fpga
display controller
special
purpose display
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CN103049380B (en
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刘天玥
秦信刚
高齐
黄亮
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Wuhan Lingjiu Microelectronics Co ltd
709th Research Institute of CSSC
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709th Research Institute of CSIC
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Abstract

A VBIOS (video basic input output system) debugging method for a special display controller is a method for debugging the display controller by combining hardware and software at an FPGA (field programmable gate array) verification stage. The method includes following steps: (1), establishing an FPGA project of the special display controller on a mainframe, enabling VBIOS register parameters and signals in FPGA logic design to be one-to-one correspondence; (2), completing initialization of an FPGA by the main frame through a JTAG (joint test action group) interface; (3), reading needed data obtained from an FPGA debugging platform by the mainframe through the JTAG interface, simultaneously, a seven-segment digital tube connected with the FPGA can also display the data; and (4), judging executing states of VBIOS according to parameter values, analyzing results, positioning problems in the VBIOS design and solving by a designer. By the VBIOS debugging method for the special display controller, VBIOS debugging process can be simplified to enable VBIOS debugging to be simple and efficient, and development cost and time are saved.

Description

A kind of VBIOS adjustment method of special-purpose display controller
Technical field
The present invention relates to special-purpose display controller technical field, specifically the method for a kind of debugging VBIOS that combines at the FPGA of special-purpose display controller Qualify Phase hardware and software.
Background technology
VBIOS (Video Basic Input Output System) is the display control program that a group and display controller are combined closely, and is solidificated among the ROM, becomes the part of video card.Even to this day, every kind of display controller has the special-purpose VBIOS of oneself to support, but all VBIOS support VGA (Video graphics array) standard and VBE (VESA BIOS Extension) standard bar none.The VGA standard is that IBM Corporation in 1987 formulates the video card standard, comprise VGA register standard and VGA BIOS standard, later stage is because the development of display technique, the VGA standard can't satisfy application demand, video electronic is learned the VBIOS funcall interface standard that ANSI VESA (Video Electronics Standards Association) has proposed one group of expansion, be VBE (VESA BIOS Extension), realized compatibility between the various video cards at the software interface level.The VBIOS function comprises the interrupt service routine of video card initialize routine and INT 10H.Operating system or driver are by the basic operation of VIBOS interface to display controller, as adjusting resolution, color depth, refresh rate etc.
The VBIOS design is closely related with the display controller bottom hardware, and the deviser wishes to identify FPGA hardware design mistake and VBIOS design software mistake.But VBIOS designs complicated, and only has software interface standard, and traditional hardware debug method is difficult to identification VBIOS design problem.Simultaneously, the VBIOS debugging faces the problem that display terminal can not show any information, has limited the use of traditional software debugging method, and conventional debugging method is fewer.
In order to solve above-mentioned problems of the prior art, the present invention utilizes the characteristics of VBIOS funcall, has proposed a kind of adjustment method that combines based on the software and hardware of FPGA.
Summary of the invention
The VBIOS adjustment method that the purpose of this invention is to provide a kind of special-purpose display controller, related special-purpose display controller and VBIOS be compatible with VGA standard and VBE standard.The present invention realizes simply, can the parameter that the VBIOS that be concerned about calls be sent to main frame by jtag interface, locates easily VBIOS executing location and executing state.
A kind of VBIOS adjustment method of special-purpose display controller, described debugging enironment comprise the FPGA debug platform of special-purpose display controller of an integrated FPGA, jtag interface, seven segment digital tubes, VBIOS chip and the main frame of accepting sampled data.
A kind of VBIOS adjustment method of special-purpose display controller, its step is as follows:
(1) set up the FPGA engineering of special-purpose display controller at main frame, corresponding and set sampling condition one by one the signal in VBIOS register parameters and the fpga logic design, then logic compiler generates the FPGA configuration file;
(2) the FPGA configuration file downloads to the FPGA debug platform of special-purpose display controller by jtag interface from main frame, and the signal in VBIOS register parameters and the fpga logic design is set up corresponding relation, finishes the FPGA initialization;
(3) the power on FPGA debug platform of rear display controller is started working, and according to sampling condition, main frame reads from the FPGA debug platform by jtag interface and obtains the data that need, and the seven segment digital tubes that is connected with FPGA simultaneously also can show these data;
(4) the VBIOS register parameters value that obtains according to main frame of designer is judged the executing state of VBIOS and to interpretation of result according to parameter value, thus the problem in the VBIOS design of location and solving.
Cardinal principle of the present invention is as follows: the fpga logic project engineering that the designer sets up at main frame, corresponding one by one the signal in VBIOS register parameters and the fpga logic design, by the JTAG technology, to the FPGA initialization, main frame just can be accessed the internal register of FPGA and the VBIOS register parameters of loading by jtag interface.The unified INT 10H function of using of VBIOS funcall is inputted one group of register parameters simultaneously, and the return parameters value realizes various Presentation Functions again.Therefore, the VBIOS register parameters value that the designer obtains according to main frame is easy to VBIOS executing location location, and analyzes the problem of hardware or Software for Design appearance.
The advantage of the VBIOS adjustment method of the special-purpose display controller of the present invention is: (1) this VBIOS adjustment method can correctly be identified the VBIOS practice condition, accurately location VBIOS executing location solves the difficult problem that the traditional hardware adjustment method is difficult to identification VBIOS design problem; (2) face in the situation that display terminal can not show any information in VBIOS debugging, this VBIOS adjustment method still can be obtained the data that need and obtain the VBIOS practice condition, and having broken through the traditional software adjustment method need to have the just operable restriction of demonstration information; (3) this VBIOS adjustment method is simple and convenient, just can obtain the data that need by jtag interface, does not need other debugging acids, has saved expensive expense and time.This VBIOS adjustment method has solved the VBIOS design problem of a special-purpose display controller well, and this special-purpose display controller is working properly at present.
Description of drawings
Fig. 1 VBIOS adjustment method logical organization synoptic diagram;
Fig. 2 VBIOS adjustment method process synoptic diagram.
Embodiment:
Root a tree name Fig. 1, shown in Figure 2 ,A kind of VBIOS adjustment method of special-purpose display controller, its step is as follows :
1. loading parameters and sampling condition
The designer sets up the FPGA engineering of special-purpose display controller at main frame, simultaneously in this FPGA engineering, load specific logic signals, these logical signals are corresponding one by one with register parameters such as the used AX of VBIOS function, BX, CX, DX, ES, DI, set simultaneously sampling condition.Sampling condition is made as INT 10H funcall has occured, and the register parameters such as AX, BX, CX, DX, ES, DI have just had its meaning like this, for lower surface analysis VBIOS ready.After above condition was established, compiling formed the FPGA configuration file to the designer to the fpga logic project engineering.
2. by jtag interface parameter is outputed to the FPGA debug platform of special-purpose display controller
The FPGA configuration file downloads to FPGA by jtag interface, and the signal in VBIOS register parameters and the fpga logic design has been set up corresponding relation, finishes the FPGA initialization.
3. the VBIOS parameter value seven segment digital tubes that outputs to main frame or be connected with FPGA
Main frame reads the data of obtaining needs according to the sampling condition of main frame setting by jtag interface from the FPGA debug platform of special-purpose display controller, and the seven segment digital tubes that is connected with FPGA simultaneously also can show these data.
4. analyze the VBIOS parameter value
Logical design and the VBIOS of special-purpose display controller FPGA design compatible with VGA standard and VBE standard.VGA funcall regulation: AH equals the function number of VGA; AH<13H; Call INT 10H.VBE funcall regulation: AH must equal 4Fh, illustrates to call the VBE function; AL equals the function number of VBE; BL equals subfunction number, also can not have subfunction; Call INT 10H; Rreturn value is all in AX.Be easy to analyze the implementation status of VBIOS according to above regulation.
If sampling condition does not occur, illustrate that the VBIOS function of appointment is not carried out, analyze the VBIOS program and whether jumped out.If sampling condition has occured, called which function from the judgement of the register parameters values such as AX, BX, CX, DX, ES, DI, whether these functions are correctly carried out at last, and whether rreturn value meets the requirements, and from returning AX parameter location VBIOS executing location.If rreturn value AX value is 0, illustrate that this interrupts 10 functions and correctly carries out, if fruit AX value is 1, illustrates and interrupt not correct execution of 10 functions.

Claims (5)

1. the VBIOS adjustment method of a special-purpose display controller is characterized in that, its step is as follows:
(1) set up the FPGA engineering of special-purpose display controller at main frame, corresponding and set sampling condition one by one the signal in VBIOS register parameters and the fpga logic design, then logic compiler generates the FPGA configuration file;
(2) the FPGA configuration file that generates is above downloaded to the FPGA debug platform of special-purpose display controller by jtag interface from main frame, the signal in VBIOS register parameters and the fpga logic design is set up corresponding relation;
(3) main frame reads from the FPGA debug platform of special-purpose display controller by jtag interface and obtains the data that need, and the seven segment digital tubes that is connected with this FPGA simultaneously also can show these data;
(4) designer locates the VBIOS executing location according to the VBIOS register parameters value that main frame obtains, and analyzes the problem of hardware or Software for Design appearance.
2. the VBIOS adjustment method of a kind of special-purpose display controller as claimed in claim 1, it is characterized in that, in the described step (1), be loaded into the logical signal of special-purpose display controller FPGA engineering, with the VBIOS register parameters be one to one so that logical signal has specific meaning.
3. the VBIOS adjustment method of a kind of special-purpose display controller as claimed in claim 1, it is characterized in that, in the described step (2), initialization is by jtag interface to FPGA, and the FPGA debug platform that the FPGA configuration file is downloaded to special-purpose display controller is finished.
4. the VBIOS adjustment method of a kind of special-purpose display controller as claimed in claim 1 is characterized in that, in the described step (3), it is to obtain by jtag interface that main frame obtains the parameter information of being concerned about from the FPGA debug platform of special-purpose display controller.
5. the VBIOS adjustment method of a kind of special-purpose display controller as claimed in claim 1, in the described step (4), analyze the VBIOS parameter value, search the position that VBIOS carries out according to the AX value, and obtain special-purpose display controller system and which has been carried out interrupt 10 functions, and after confirming that function is carried out, judge according to the AX rreturn value whether these functions are correctly carried out.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103729221A (en) * 2013-12-30 2014-04-16 合肥联宝信息技术有限公司 Method and device for writing BIOS debugging information into hard disk
CN107066222A (en) * 2017-02-10 2017-08-18 济南浪潮高新科技投资发展有限公司 A kind of quick display device and method based on domestic processor platform
CN107526614A (en) * 2017-08-30 2017-12-29 苏州思得普信息科技有限公司 FPGA development boards and its communication means
CN110597678A (en) * 2019-09-09 2019-12-20 腾讯科技(深圳)有限公司 Debugging method and debugging unit

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US5615331A (en) * 1994-06-23 1997-03-25 Phoenix Technologies Ltd. System and method for debugging a computing system
CN102346235A (en) * 2011-07-11 2012-02-08 北京北大众志微系统科技有限责任公司 Automatic test system and method for hardware device function
CN102385545A (en) * 2010-08-30 2012-03-21 鸿富锦精密工业(深圳)有限公司 BIOS (Basic Input Output System) debugger and debugging method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5615331A (en) * 1994-06-23 1997-03-25 Phoenix Technologies Ltd. System and method for debugging a computing system
CN102385545A (en) * 2010-08-30 2012-03-21 鸿富锦精密工业(深圳)有限公司 BIOS (Basic Input Output System) debugger and debugging method
CN102346235A (en) * 2011-07-11 2012-02-08 北京北大众志微系统科技有限责任公司 Automatic test system and method for hardware device function

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103729221A (en) * 2013-12-30 2014-04-16 合肥联宝信息技术有限公司 Method and device for writing BIOS debugging information into hard disk
CN107066222A (en) * 2017-02-10 2017-08-18 济南浪潮高新科技投资发展有限公司 A kind of quick display device and method based on domestic processor platform
CN107526614A (en) * 2017-08-30 2017-12-29 苏州思得普信息科技有限公司 FPGA development boards and its communication means
CN107526614B (en) * 2017-08-30 2020-07-03 苏州思得普信息科技有限公司 Communication method of FPGA development board
CN110597678A (en) * 2019-09-09 2019-12-20 腾讯科技(深圳)有限公司 Debugging method and debugging unit

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