CN100419699C - Method and device remotely automatic recovering CMOS date with network - Google Patents
Method and device remotely automatic recovering CMOS date with network Download PDFInfo
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- CN100419699C CN100419699C CNB2006100653357A CN200610065335A CN100419699C CN 100419699 C CN100419699 C CN 100419699C CN B2006100653357 A CNB2006100653357 A CN B2006100653357A CN 200610065335 A CN200610065335 A CN 200610065335A CN 100419699 C CN100419699 C CN 100419699C
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Abstract
The invention discloses a method and system for recovering computer CMOS data remotely, the system comprises a BMC, a first storage apparatus for storing a backup CMOS data, a CMOS clear circuit for clearing the CMOS data in the CMOS RAM, the method comprises the steps of: the remote console sending a CMOS data-clearing command to BMC, CMOS clear circuit clearing the CMOS data in the CMOS RAM under the control of BMC, the BIOS writing the CMOS data in the first storage apparatus into the CMOS RAM. By using the invention, the CMOS data can be recovered remotely and automatically and the operation is simple.
Description
Technical field
The present invention relates to a kind of method and apparatus of restoring CMOS data, relate in particular to a kind of method and apparatus by the automatic restoring CMOS data of network remote.
Background technology
Because the maloperation that produces in computed process of user perhaps is subjected to the attack of virus, cause the information of preserving among the CMOS chaotic or lose through regular meeting.And that the start that brings does not thus have the failure rate of demonstration is very high yet, by to the statistics of association's mantenance data as can be known, is all accounting for 5% in the maintenance capacities.Because being not enough to finish by the mode of wire jumper, the usage level of most of PC user removes data among the CMOS, and recover its initial value, therefore, because making house calls of causing of this problem increased computer manufacturer and user's maintenance cost, also can reduce user's satisfaction simultaneously.
Though the method that existing at present some patents provide the mode of wire jumper free to remove CMOS,, these schemes all can only be at user's execute-in-place, and still needs the work of craftsmenship in operation.On ease for use, still there is defective.
Summary of the invention
Purpose of the present invention just provides a kind of method and apparatus that can the remotely automatic recovering CMOS data, makes the recovery of cmos data simple.The present invention adopts following technical scheme to realize purpose of the present invention:
The invention provides a kind of method of computer remote restoring CMOS data, wherein said computing machine comprises baseboard management controller BMC and a first memory that is used for the cmos data of storage backup, and this method comprises the steps:
1) remote console sends the instruction of removing cmos data to the baseboard management controller BMC of the described computing machine that is in off-mode;
2) baseboard management controller BMC control CMOS removes the cmos data among the circuit removing CMOS RAM;
3) when computer starting,, then the cmos data in the described first memory is written among the described CMOS RAM if the cmos data that basic input-output system BIOS detects among the described CMOSRAM is eliminated.
The step of the cmos data among the described removing CMOS RAM comprises that the current potential with certain pin among the CMOS RAM drags down.
The described step that the current potential of certain pin among the CMOS RAM is dragged down comprises with baseboard management controller BMC a pin set, and this pin makes a switch conduction, thereby the voltage on certain pin among the CMOS RAM is reduced.
Cmos data in the described first memory is to fire in advance in described storer.
Described CMOS RAM is built-in static memory or the special-purpose CMOS memory among the computing machine South Bridge chip ICH.
The present invention also provides a kind of computer system, comprises baseboard management controller BMC and basic input-output system BIOS, it is characterized in that, this system comprises that also first memory and CMOS remove circuit;
Described first memory is used for the cmos data of storage backup;
Described CMOS removes circuit, is used for removing the cmos data of CMOS RAM;
Described baseboard management controller BMC when the computing machine at its place is in off-mode, can controls described CMOS and remove circuit and remove cmos data among the described CMOS RAM,
Described BIOS when computer starting, if the cmos data that detects among the described CMOS RAM is eliminated, then is written to the cmos data in the described first memory among the described CMOS RAM.
Described CMOS removes circuit and comprises that an energy drags down the voltage of the pin of described CMOS RAM to remove the circuit of cmos data.
The circuit that the voltage of a described pin with CMOS RAM drags down comprises one first switch, and described baseboard management controller BMC controls described first switch and is in conducting or disconnection.
The circuit that the voltage of a described pin with CMOS RAM drags down also comprises a second switch, and described second switch for disconnecting, is conducting when off-mode when described computing machine is in starting state.
The circuit that the voltage of a described pin with CMOS RAM drags down also comprises a hand switch, when this hand switch is off-state, makes CMOS remove circuit and can't remove CMOS.
Use technique scheme of the present invention, when computing machine can not start because cmos data is chaotic, or the system manager is when needing again primary data in the restoring CMOS, can pass through network, client (remote console) by a long-range placement is got in touch with the network chip of Be Controlled computing machine, sends the instruction of removing CMOS information and replacement CMOS primary data.
After the operation of removing cmos data is finished, send information by control circuit to client, represent that the action of long-range removing cmos data is finished.Then, send the instruction that starts computing machine by client again, restoring CMOS data when allowing controlled computer start.
Description of drawings
Fig. 1 is Computer Systems Organization figure of the present invention;
Fig. 2 is the executive circuit figure of the removing CMOS among the present invention.
Embodiment
The present invention is based on baseboard management controller BMC is the management framework that meets IPMI agreement (IPMI2.0) of core, can certainly build by other intelligent chip.Adopting the BMC framework to finish the outer CMOS of band in an embodiment of the present invention removes.With reference to figure 1, the present invention has increased first memory on the basis of prior art scheme and CMOS removes circuit, BMC connects the outer NIC (network chip of a band by SMBUS (System ManagementBus), or title network interface card controller), can realize that by this NIC setting up the outer network of band with control desk connects.Wherein BMC and NIC etc. all are prior aries, described CMOS removes circuit and is connected with ICH (South Bridge chip) with the pin of BMC, being connected of MCH and ICH meets IA (intel architechture) framework (Intel Architecture), and ICH, BMC are to be connected by lpc bus with first memory.
This first memory can be nonvolatile memory, and as the FLASH storer, the BIOS that is used for storage backup is provided with (cmos data), and this BIOS is provided with and is equivalent to a kind of default BIOS setting, can fire in advance in this first memory.Wherein, adopt inside static memory in the ICH chip as CMOS RAM (CMOS (Complementary Metal Oxide Semiconductor) semiconducting random access memory) in the present embodiment, be used to store cmos data (BIOS setting), cmos data is stored in the South Bridge chip of mainboard usually, and capacity has only 256 bytes.Certainly, also can adopt the storage chip of special CMOS RAM, can utilize CMOS removing circuit of the present invention that CMOS RAM is discharged equally and remove cmos data easily as the storage cmos data; When computing machine is in off-mode, provide power supply by 5VSB (5V is often by voltage), guarantee that BMC carries out proper communication by the control desk of NIC and far-end.
In the present embodiment, by designing an OEM IPMI command clear cmos, send the order (clear cmos) of removing the cmos data among the CMOS RAM (CMOS RAM is the inside static memory in the ICH chip in the present embodiment) at remote console to the BMC of computing machine, the BMC of computing machine accepts to resolve after this order, from being used to control a pin (GPIO pin) the output control signal that CMOS removes circuit, this control signal control CMOS removes the cmos data of preserving in the inside static memory of circuit removing in the ICH chip.
Remove circuit description BMC below in conjunction with the CMOS among Fig. 2 and carry out the principle of removing CMOS.Remove cmos data in order to be implemented in the shut down of computer state; CMOS of the present invention removes circuit design the electrization protection circuit; make the user under the situation of computer starting, can't remove cmos data; electromagnetic switch K1 among Fig. 2 works as computing machine at starting state; make K switch 1 often open by the 5V power supply, make and to remove cmos data.For this reason, must selection can represent the 220V power supply to keep the signal of connection status, select the 5V power supply in this case.The 5V power supply be computer power supply when computing machine is in starting state, the 220V power supply provides the power supply of output.The 220V power supply also provides 5VSB (the standing power supply of 5V) simultaneously, it is different with 12V as 3V, 5V with other power supply outputs, is independent output, if not output of 5VSB, can show does not so provide power supply 220V power supply, and this 5VSB is used to BMC and NIC etc. that power supply is provided.
Be the relation between explanation 5VSB and the 220W power supply, brief explanation ATX power specification.This specification is proposed by Intel Company, the industrial standard that is widely used.With the ATX power supply is example, and its standing power supply (standby power) 5VSB is the power supply of a direct current 5V, and maximum can provide 0.7A the output current of (ampere), so that drive the normal power management in the computer system under the state of system closedown.And the present invention utilizes this type of supply unit that main power supply and standby power supply can be provided to finish long-range removing cmos data.
The maintenance and the removing of the cmos data in the inner static memory of ICH (computing machine South Bridge chip) are managed by two pins: the pin VCCRTC of ICH chip is the power supply pin of inner static memory, as long as voltage is higher than the content that 2V just can be maintained inner static memory storage, but the mode that the ICH chip does not allow directly the VCCRTC pin to be pulled down to below the 2V is removed the CMOS setting.Remove the another one pin RTCRST that CMOS is provided with to be needed by the ICH chip, as long as it is effective that the RTCRST pin is pulled down to low level, ICH will dispose the content in its inner static memory so, reaches the purpose of removing cmos data.
In Fig. 2, the power supply of the VCCRTC pin of the static memory of ICH chip is finished jointly by battery and 3.3VSB.Under open state and connection alternating current 220V power supply off-mode, 3.3VSB all exist, through voltage modulated, under the situation that 3.3VSB exists, the power supply of ICH chip internal static memory is provided by 3.3VSB the standing voltage of this 3.3V by the standing voltage of 5VSB.When pulling out supply socket, just there has not been 3.3VSB, this moment, ICH chip internal static memory was provided by the CMOS battery, had so just guaranteed that cmos data can not lost in any case.Diode D1 and D2 are used for 3.3VSB power supply and CMOS battery are isolated among Fig. 2.
Remove CMOS if desired content is set, only the voltage of RTCRST pin need be pulled down to low level and effectively get final product.R1, R2, R4 are current-limiting resistance among the figure, by current-limiting resistance R4 the electric charge in the capacitor C 1 are bled off and the voltage of RTCRST pin can be pulled down to low level.The setting of resistance is those of ordinary skills' basic skills, just no longer describes in detail here; In order to guarantee that the user avoids carrying out COMS and removes action under the start situation, the present invention guarantees by an electromagnetic switch K1, with reference to figure 2.Electromagnetic switch K1 is a normally closed electromagnetic switch, produce the 5V power supply at open state 220V power supply, the 5V power supply is electromagnetic switch K1 power supply by the current-limiting resistance R3 that connects, electromagnetic switch is in the state of disconnection, even electromagnetic switch K2 and all conductings of controlling by BMC of hand switch K3 like this, also can the not release electric charge of electric capacity C1, thus guarantee that the RTCRST pin voltage is always high, can not carry out the removing action of cmos data.Unless under the situation of shutdown, all conductings of K switch 1 and K3, send the instruction of removing cmos data by remote console to the BMC of computing machine, BMC produces a GPIO signal according to this instruction, this GPIO signal is applied to electromagnetic switch K2, and upward (the GPIO pin of BMC is connected with the control end of electromagnetic switch K2, producing a GPIO signal is exactly with this GPIO pin set, produce a control voltage), make electromagnetic switch K2 conducting, just can the release electric charge of electric capacity C1, drag down the level of RTCRST pin, carry out CMOS and remove action.Here the switch of K switch 2 for often opening, and the current-limiting resistance of can connecting on K switch 2, this GPIO signal is applied on the K switch 2 by this current-limiting resistance.It is in order to prevent that the another layer of illegally removing cmos data from ensureing that a hand switch K3 is set here, for K switch 1 and K3 is not essential, only be for more safety for the purpose of just the setting switch, there are not this two switches, can remove cmos data equally, more careful when just operating like this, prevent maloperation.
By above analysis, the order of BMC execution removing CMOS is all right have been understood, can select the last GPIO pin of BMC, be connected to the control end of electromagnetic switch K2, after receiving the order of removing CMOS, this GPIO pin of BMC set (being equivalent to the GPIO signal), thus make electromagnetic switch K2 closure, thus reach the action of removing CMOS.After having removed cmos data, BMC can send information to remote console, and the action of expression remote reset cmos data is finished, and like this, remote console just can control computer restart.
The removing of cmos data has been described above, the recovery of cmos data is described below, in the present invention with needing Basic Input or Output System (BIOS) (BIOS) is improved, the start-up course of computing machine is all controlled by bios program, in start-up course, BIOS can detect the state of cmos data, if the cmos data that detects among the ICH is eliminated, then from first memory BIOS is provided with (cmos data) automatically and imports in the static memory the ICH.Like this, cmos data has just obtained recovery, and computing machine also can operate as normal.
The foregoing description adopts is stored in cmos data in the inside static memory in the ICH chip, certainly, also can adopt the storage chip of special CMOS RAM (CMOS (Complementary Metal Oxide Semiconductor) semiconducting random access memory) as the storage cmos data, in this chip, have power pin equally and can adopt and drag down the pin that current potential discharges cmos data, also can be different with the inside static memory of ICH chip, employing drags down the mode of power pin current potential and removes cmos data, for the Method and circuits that is used to drag down the pin current potential all is some very common Method and circuits, those of ordinary skills can not need to spend performing creative labour by actual conditions and just can utilize various bleeder circuits to finish the current potential that drags down the storer pin, have just exemplified no longer one by one here.
For by BIOS control the data in the storer being written to inside static memory in the ICH chip or the technology in the special CMOS RAM storer can realize by software, those of ordinary skills do not need to spend performing creative labour and just can realize, here just do not needed detailed description, the present invention will be intended to remove cmos data among the CMOS RAM by the control of remote console, to be stored in the special storer BIOS then in advance and be provided with and be written among the CMOS RAM, reach the purpose of restoring CMOS data.
K switch 1 and K2 have adopted electromagnetic switch in the foregoing description, but are not limited to this, can also adopt electronic switch well-known to those skilled in the art.Adopted capacitor C 1 in the foregoing description, still it will be understood by those skilled in the art that to need only reasonable that current-limiting resistance is provided with, do not need capacitor C 1, even can not need current-limiting resistance R4, can drag down the level of RTCRST pin equally, to realize removing the purpose of cmos data.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (13)
1. the method for computer remote restoring CMOS data, wherein said computing machine comprises baseboard management controller BMC and a first memory that is used for the cmos data of storage backup, this method comprises the steps:
1) remote console sends the instruction of removing cmos data to the baseboard management controller BMC of the described computing machine that is in off-mode;
2) baseboard management controller BMC control CMOS removes the cmos data among the circuit removing CMOS RAM;
3) when computer starting,, then the cmos data in the described first memory is written among the described CMOS RAM if the cmos data that basic input-output system BIOS detects among the described CMOSRAM is eliminated.
2. according to the method for the computer remote restoring CMOS data described in the claim 1, it is characterized in that the step of the cmos data among the described removing CMOS RAM comprises that the current potential with certain pin among the CMOS RAM drags down.
3. according to the method for the computer remote restoring CMOS data described in the claim 2, it is characterized in that, the described step that the current potential of certain pin among the CMOS RAM is dragged down comprises with baseboard management controller BMC a pin set, this pin makes a switch conduction, thereby the voltage on certain pin among the CMOS RAM is reduced.
4. according to the method for each described computer remote restoring CMOS data in the claim 1 to 3, it is characterized in that the cmos data in the described first memory is to fire in advance in described storer.
5. according to the method for each described computer remote restoring CMOS data in the claim 1 to 3, it is characterized in that described CMOS RAM is built-in static memory or the special-purpose CMOS memory among the computing machine South Bridge chip ICH.
6. the method for computer remote restoring CMOS data according to claim 4 is characterized in that, described CMOS RAM is built-in static memory or the special-purpose CMOS memory among the computing machine South Bridge chip ICH.
7. a computer system comprises baseboard management controller BMC and basic input-output system BIOS, it is characterized in that, this system comprises that also first memory and CMOS remove circuit;
Described first memory is used for the cmos data of storage backup;
Described CMOS removes circuit, is used for removing the cmos data of CMOS RAM;
Described baseboard management controller BMC when the computing machine at its place is in off-mode, can controls described CMOS and remove circuit and remove cmos data among the described CMOS RAM,
Described BIOS when computer starting, if the cmos data that detects among the described CMOS RAM is eliminated, then is written to the cmos data in the described first memory among the described CMOS RAM.
8. computer system according to claim 7 is characterized in that, described CMOS removes circuit and comprises that an energy drags down the voltage of the pin of described CMOS RAM to remove the circuit of cmos data.
9. computer system according to claim 8 is characterized in that, the circuit that the voltage of a described pin with CMOS RAM drags down comprises one first switch, and described baseboard management controller BMC controls described first switch and is in conducting or disconnection.
10. computer system according to claim 9, it is characterized in that, the circuit that the voltage of a described pin with CMOS RAM drags down also comprises a second switch, and described second switch for disconnecting, is conducting when off-mode when described computing machine is in starting state.
11. computer system according to claim 9 is characterized in that, the circuit that the voltage of a described pin with CMOS RAM drags down comprises a hand switch, when this hand switch is off-state, makes CMOS remove circuit and can't remove CMOS.
12., it is characterized in that described CMOS RAM is built-in static memory or the special-purpose CMOS memory among the computing machine South Bridge chip ICH according to each described computer system in the claim 7 to 11.
13. computer system according to claim 10 is characterized in that, the circuit that the voltage of a described pin with CMOSRAM drags down comprises a hand switch, when this hand switch is off-state, makes CMOS remove circuit and can't remove CMOS.
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| CNB2006100653357A CN100419699C (en) | 2006-03-17 | 2006-03-17 | Method and device remotely automatic recovering CMOS date with network |
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| CN107908508A (en) * | 2017-10-10 | 2018-04-13 | 曙光信息产业(北京)有限公司 | The method, apparatus and server of control BIOS Debugging message output in real time |
| CN107894934A (en) * | 2017-10-10 | 2018-04-10 | 曙光信息产业(北京)有限公司 | Control the method, apparatus and server of BIOS Debugging message output |
| CN110858165B (en) * | 2018-08-22 | 2023-05-02 | 杭州海康威视数字技术股份有限公司 | Chip set, chip set starting method and electronic equipment |
| CN111142961B (en) * | 2018-11-02 | 2022-12-27 | 佛山市顺德区顺达电脑厂有限公司 | Basic input/output system setting method |
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