CA2151796C - Method and system for downloading data to network nodes - Google Patents

Method and system for downloading data to network nodes

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Publication number
CA2151796C
CA2151796C CA002151796A CA2151796A CA2151796C CA 2151796 C CA2151796 C CA 2151796C CA 002151796 A CA002151796 A CA 002151796A CA 2151796 A CA2151796 A CA 2151796A CA 2151796 C CA2151796 C CA 2151796C
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CA
Canada
Prior art keywords
memory
data
data file
network
storing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA002151796A
Other languages
French (fr)
Other versions
CA2151796A1 (en
Inventor
Yasuyo Okanoue
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NEC Corp
Original Assignee
NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of CA2151796A1 publication Critical patent/CA2151796A1/en
Application granted granted Critical
Publication of CA2151796C publication Critical patent/CA2151796C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/54Link editing before load time
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level
    • G06F11/1433Saving, restoring, recovering or retrying at system level during software upgrading

Abstract

A network system comprises a terminal storing an update data file, a gateway device having a temporary memory, and a network comprising a plurality of nodes. Each node is provided with an active memory for storing a current data file and at least a backup memory for storing the update data file.
Data of the update data file are sequentially transferred from the terminal to the backup memory of each node through the gateway device in which the data is stored into the temporary memory. After the update data file has been stored in the backup memory, the update data file is caused to be active and the current data file to be non-active

Description

~1 5 17 9 6 METHOD AND SYSTEM FOR DOWNLOADING DAT~ TO NETWORK NODES

BACKGROUND OF THE INVENTION

1. Field of the Invention The present inventlon relates to a technique of updating data of a plurality of network nodes and, more specifically, to a method for downloadlng the same data to respectlve memorles of the network nodes and a system therefor.
2. Descrlptlon of the Related Art In general, a memory chlp lncorporatlng flrmware ls mounted on a computer or the llke to lncrease the speed of executlng a program. Although flrmware usually has a seml-flxed software functlon as an operatlng system, flrmware update may be needed when the sltuatlon ls changed.
Conventlonally, flrmware update ls performed by replaclng a memory chlp lncorporatlng flrmware wlth another one.
However, ln a communlcatlons network havlng a plurallty of network nodes (herelnafter called "CPU unlts") as components, lt takes much tlme and labor for a malntenance person to pull out a package and replace a memory chlp wlth another one. Further, the network servlce ls lnterrupted durlng such an operatlon.
To solve the above problem, ln recent years, there has been proposed and put lnto a practlcal stage a download method ln whlch flrmware updatlng ls effected by transferrlng new flrmware to memorles of respectlve CPU unlts from the ~ s~
~ 75372-3 CA 021~1796 1998-10-22 outslde of a network.
However, in the conventlonal download method, since data is transferred from an external termlnal to a plurality of CPU units according to a point-to-point scheme, the flrmware updatlng cannot be performed at hlgh speed, whlch means that the network servlce lnterrupting tlme cannot be shortened sufflclently. In partlcular, the lnterruptlng time becomes longer as the number of CPU units (network nodes) increases.
Further, in the conventional system, slnce the new firmware is rewritten to the memory of a CPU unit upon downloadlng, the old firmware cannot be used immediately when the new firmware has a problem, ln whlch case the network service lnterrupting time becomes longer.
SUMMARY OF THE INVENTION
An ob~ect of the present inventlon ls to provlde a download method and a network system whlch can shorten the network service interrupting tlme by efflclently transferring the same data to a plurallty of network nodes.
Another ob~ect of the lnventlon ls to provide a network system in whlch old data can easlly be used even after new data has been downloaded.
A system accordlng to a first broad aspect of the present inventlon ls comprised of a flrst devlce comprlslng a flrst memory for storlng a flrst data flle; a second devlce comprlslng a second memory for storlng the flrst data flle recelved from the flrst devlce; and CA 021~1796 1998-10-22 a network whlch ls connected to the second devlce and recelves the flrst data flle from the second devlce, the network comprlslng a plurallty of nodes ln a predetermined conflguratlon, each node comprlslng: a plurallty of memorles each havlng a capaclty whlch ls not smaller than an amount of the flrst data flle, one of the plurallty of memorles storlng a second data flle; and control means for controlllng the plurallty of memorles such that another of the plurallty of memorles stores the flrst data flle recelved from the second devlce.
Preferably, each node further comprlses: an actlve memory for storlng the second data flle; a plurallty of backup memorles havlng at least a flrst and a second backup memory, the flrst backup memory storlng the second data flle; and control means for controlllng the actlve memory and the backup memorles such that the flrst data flle recelved from the second devlce is stored onto the second backup memory and the flrst data flle stored ln the second backup memory ls copled onto the actlve memory.
Preferably, the data of the update data flle are sequentlally transferred from the termlnal to the transfer devlce. The data of the update data flle are further sequentlally transferred from the transfer devlce to all the nodes of the network whlle belng stored ln the temporary memory of the transfer devlce.
Accordlng to a second broad aspect, the present inventlon provldes ln a system comprlslng a transfer devlce CA 021~1796 1998-10-22 and a network connected to the transfer device, the network comprising a plurality of nodes each comprising a plurallty of memorles, one of the plurality of memorles storlng a first data file, a data transfer method for transferrlng a second data file to each node, comprising the steps of: sequentlally transferrlng data of the second data file to the transfer devlce; sequentially transferrlng the data of the second data flle from the transfer devlce to the network, whlle storlng the data of the second data flle ln the transfer devlce;
storlng the data of the second data flle received from the transfer devlce onto another memory of each node.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 ls a schematlc block dlagram showlng a tandem network accordlng to an embodlment of the present lnventlon;

2~ ~1 79~

FIG. 2(A) is a flowchart showing a general operation of a gateway device of the embodiment of FIG. 1;

FIG. 2(B) is a flowchart showing a general operation of each CPU unit;

FIG. 3 is a schematic block diagram showing a bus network system according to another embodiment of the invention;

FIG. 4(A) is a flowchart showing a general operation of a gateway device of the system of FIG. 3;

FIG. 4(B) is a flowchart showing a general operation of each CPU unit;

FIG. 5 is a schematic block diagram showing a configuration of a CPU unit of a network system according to the invention;

FIG. 6 is a memory state transition diagram of the CPU
unit of FIG. 5;

FIG. 7 is a schematic block diagram showing another configuration of a CPU unit of a network system according to the invention; and FIG. 8 is a memory state transition diagram of the CPU

,.~

unit of FIG. 7.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIG. 1, a network system is comprised of a terminal 101, a gateway device 102, and a plurality of tandem-connected network nodes 1-n. Hereinafter, the terminal 101 is referred to as CID (craft interface device), and the network nodes 1-n are referred to as CPU units. The CPU unit 1 is connected to the CID 101 via the gateway device 102 which is connected to the CID 101 directly by use of a communication device or via another network. New firmware to be transferred is stored as a download file in the CID 101.
The gateway device 102, which is used for connection of a network, connects the CID 101 with the CPU unit 1 in this embodiment. Where the CID 101 is distant from the CPU unit 1 and connected to another network, the gateway device 102 connects that network to the CPU unit 1. The gateway device 102 is provided with at least a processor (CPU) and a temporary memory 103 having a capacity larger than the size of the download file stored in the CID 101.
The CPU units 1-n, which are connected in tandem with the gateway device 102 as a starting point device, are target units of the firmware downloading. The respective CPU units 1-n are provided with processors (CPUs), active 2~ memories AM1-AMn, and backup memories BM1-BMn. The active CA 021~1796 1998-10-22 memories AM1-AMn and backup memories BM1-BMn have a capacity larger than the size of the download flle. A specific configuration of each CPU unlt will be described later with reference to FIG. 5 or 7.
In FIGs. 2(A) and 2(B), respective operations of the gateway device 102 and each CPU unit are illustrated.
Referring to FIG. 2(A), the CID 101 transmits a control message and a download file (new firmware) to the gateway device 102. The control message includes information of the total data amount of the download file. Upon reception of the first data (step S1), the gateway device 102 stores that data into the temporary memory 103 (step S2), and transfers the same data and the control message to the CPU unit 1 (step S3).
In the similar manner, steps S1-S3 are repeated until all the data of the download file are correctly transferred to CPU
unit 1.
Referring to FIG. 2(B), upon reception of the control message and the first data from the gateway devlce 102 (step S4), the CPU unit 1 stores the first data into the backup memory BM1 (step S5), and transfers the control message and the first data to the next target unit, i.e., the CPU unit 2 (step S6). By determining the total data amount of the download flle from the control message, the CPU unlt 1 repeats the operation of storing data received from the gateway device 102 into the backup memory BM1 and transferring the data until all the data is successfully transferred to the CPU unlt 2.
Performing similar operatlons, the CPU unit 2 transfers all - CA 021~1796 1998-10-22 the data of the download flle to the CPU unit 3. The remalnlng CPU unlts perform slmllar operatlons repeatedly and, as a result, the new firmware flle ls stored into the backup memory BMl of each CPU unlt.
When the new flrmware has been stored lnto every CPU
unlt, the backup memory BMl and the actlve memory AMl are swltched ln each CPU unlt ln response to a user's lnstructlon or by automatlc control as descrlbed later, and an operatlon based on the new flrmware ls started by securlng the old flrmware.
Accordlng to the conflguration of thls embodiment, even lf transfer between the gateway devlce 102 and the CPU
unlt 1 falls, correct data ls secured ln the temporary memory 103 of the gateway devlce 102. And even lf transfer falls at any other locatlon, the correct data ls stored ln the backup memory BM of the lmmedlately precedlng CPU unlt. Therefore, the data transfer may be restarted from the locatlon of fallure.
Referrlng to FIG. 3, CPU unlts l-n and a gateway devlce 102 are connected to each other vla a bus. A download file transmitted from the CID 101 is transferred to the CPU
unlts l-n ln a parallel manner vla the bus whlle belng stored lnto a temporary memory 103 of the gateway devlce 102.
Referrlng to FIG. 4~A), the CID 101 transmlts a download file (new firmware) to the gateway devlce 102. Upon receptlon of the flrst data tstep S10), the gateway devlce 102 stores the flrst data lnto the temporary memory 103 (step - CA 021~1796 1998-10-22 Sll), and transfers the flrst data to respectlve CPU unlts l-n (step S12). The gateway devlce 102 lndependently controls data transfer operatlons to the respective CPU units l-n, and repeats steps S10-S12 untll all the data of the download flle has been correctly transferred to CPU unlts l-n.
Referrlng to FIG. 4(B), upon receptlon of the flrst data from the gateway devlce 102 (step S13), each CPU unlt stores that data lnto the backup memory BMl (step S14). By repetitlon of the slmilar operations, all the new firmware is stored lnto the backup memory BMi of each CPU unit.
When the new firmware is stored into every CPU unit, the backup memory BMi and the active memory AMl are swltched ln each CPU unlt ln response to a user's lnstructlon or by automatlc control, and an operatlon based on the new firmware ls started.
Accordlng to the conflguratlon of thls embodiment, even lf transfer between the gateway devlce 102 and each CPU
unlt fails, the data transfer may be restarted (i.e., the data ls transmltted from the temporary memory 103 of the gateway devlce 102) because the correct data are secured in the temporary memory 103.
Flrst Example of Network Node FIG. 5 lllustrates a conflguratlon of a CPU unlt in an embodlment of a network system accordlng to the invention.
A plurallty of CPU units may be connected to each other as shown in FIG. 1 or 3.

CA 021~1796 1998-10-22 The CPU unit ls comprised of a processor (CPU) 301, flle memorles 302 and 303, a boot program memory 304, and a communlcatlon controller 305. Each of the flle memories 302 and 303 ls comprlsed of a non-volatlle memory for storlng a data flle, such as a download data flle (new flrmware) ln an actlve state or non-actlve state. The CPU 301 controls the file memorles 302 and 303 such that one file memory is placed ln active state and the other ln non-actlve state. Further, the CPU 301 controls the communlcatlon controller 305 such that the download data flle ls recelved/transferred from/to outslde. In connectlon wlth the embodlment of FIG. 1, a flle memory for storlng a download data flle corresponds to the backup memory BMl and the other flle memory to the active memory AMi. The boot program memory 304 ls also a non-volatile memory. A boot program stored therein is used for booting the CPU unlt by selectlng one of the flle memories 302 and 303 at the time of a start-up or resetting. Data transfer, as descrlbed above, ls performed under control of the communlcatlon controller 305.
FIG. 6 shows a memory state transltlon dlagram of the CPU unlt shown ln FIG. 5. Assumlng that the memory 302 stores a current flle and ls ln an operatlng state and the memory 303 is in a non-operating state, download data recelved from, for example, the ad~acent CPU unit, is stored lnto the memory 303 which is now in non-operatlon, resultlng ln no lnfluence on the memory 302 which is now in operatlon.

CA 021~1796 1998-10-22 Upon execution of a "switch" command after completion of downloading, operation states of the memory 302 and the memory 303 are reversed, so that the memory 303 now storing a new flle ls placed ln operation and the memory 302 now storing an old flle ls rendered lnto non-operation. In this way, the flle updating is completed. Since the memory 302 now ln a non-operating state stores an old file, even if some problem occurs in the new file, the old file can be activated easlly, avoiding an event that the network service ls lnterrupted for a long tlme.
Second Example of Network Node FIG. 7 shows a configuratlon of a CPU unlt in another embodlment of a network system accordlng to the lnvention. The CPU unit ls comprised of a CPU 401, file memories 402 and 403, an active memory 404, a boot program memory 405, and a communication controller 406. Each of the file memories 402 and 403 is a non-volatile firmware storing memory for storing a received download file (new data file), and retaining an old data file in a non-executlon state. More speclfically, the CPU 401 controls the file memories 402 and 403 such that one file memory stores the new data file and the other stores the old data flle. Further, the CPU 401 controls the communlcation controller 406 such that the download data flle ls recelved/transferred from/to outside. The active memory 404 stores an actlve data file in use. The boot program memory 405 ls also a non-volatlle memory. A boot program stored therein is used for booting the CPU unit by CA 02l~l796 l998-l0-22 selecting one of the flle memories 402-404 at the time of a start-up or resettlng. Data transfer as descrlbed above is performed under control of the communlcatlon controller 406.
The data flle as stored ln the active memory 404 lS
always stored ln one of the flle memorles 402 and 403, and download data is wrltten to the other flle memory. In such operatlons, one flle memory does not cause any lnfluence on the other flle memory.
When downloadlng has been finished wlth all the download data stored lnto one flle memory, the download data ls copled to the actlve memory 404 and the CPU unit operates under the new flrmware. However, slnce the old flle ls stored ln the other file memory, the old-verslon flrmware can be restored easlly by copylng the old file data to the active memory 404.
FIG. 8 lllustrates a memory state transltion diagram of the CPU unlt shown in FIG. 7. In thls diagram, the file memorles 402 and 403 are loglcally dlscrimlnated as a prlmary memory (Pri) and a secondary memory (Sec). Upon every execution of a "reset" operatlon, the contents of the primary memory are copied to the actlve memory 404. An actlve flle ls always stored ln the actlve memory 404.
Referrlng to FIG. 8, ln memory state #1, an actlve flle A ls stored ln the actlve memory 404, the same flle A ls stored ln the prlmary flle as a current flle, and a download flle B ls stored ln the secondary memory.

CA 021~1796 1998-10-22 - 12a -When a "cutover" operation is executed in this state #1, the download data B of the secondary memory is copied to the active memory 404 and is activated. Thus, the memory state changes from the state #l to the state #2. When a "rollback" operatlon ls executed in the memory state #2, the ~ ~t ~ i 7~ ~

data A of the primary memory is copied to the active memory 404 and is activated. Thus, the memory state returns from #2 to #1.
When a "switch" operation is executed in the memory state #2, processing for interchanging the primary memory and the secondary memory is performed. Thus, the memory state changes from #2 to #3.
When a "reset" operation is executed in the memory state #2, the data A of the primary memory is copied to the active memory 404 and the memory state returns to #1.
However, even if the "reset" operation is executed in the memory state #3, no memory state transition is effected because the same data B is stored in the primary memory and the active memory.
Similarly, when the "cutover" operation is executed in the memory state #3, the memory state is changed from #3 to #4. When the 'Irollback" operation is executed in the memory state #4, the memory state returns to #3. When the "switch"
operation is executed in the memory state #4, the memory state returns to #1.
For example, consider a case where downloading has been finished and the memory state is changed to #2 when the new file B is copied to the active memory 404 and is activated by the "cutover" operation. Even if some problem occurs in this state, the memory state #1 can be restored simply by executing the "reset" operation, causing the CPU unit to use the trusty old file A.
As described above in detail, according to the download 2151 7~
~.

method of the invention, a certain data file is efficiently downloaded to a plurality of network nodes by sequentially transferring the data file to the network nodes while storing it in each node. This results in reduced interrupt time of the network service, for example, even in updating firmware of all the network nodes.
Since any node of a network system according to the invention is provided with memories for respectively storing a deactivated data file and an activated or currently-used data file, an old data file can easily be executed even after downloading of the updating data file. Therefore, even if some problem occurs in the new data file, the old data file can easily be executed to thereby shorten the network service interrupting time.

Claims (30)

1. A system comprising:
a first device comprising a first memory for storing a first data file;
a second device comprising a second memory for storing the first data file received from the first device; and a network which is connected to the second device and receives the first data file from the second device, the network comprising a plurality of nodes in a predetermined configuration, each node comprising:
a plurality of memories each having a capacity which is not smaller than an amount of the first data file, one of the plurality of memories storing a second data file; and control means for controlling the plurality of memories such that another of the plurality of memories stores the first data file received from the second device.
2. The system according to claim 1, wherein the control means controls the plurality of memories such that a memory storing the first data file is caused to be active and a memory storing the second data file is caused to be non-active.
3. The system according to claim 2, wherein, when the first data file does not perform properly, the control means controls the plurality of memories such that the memory storing the first data file is caused to be non-active and the memory storing the second data file is caused to be active.
4. The system according to claim 1, wherein each node further comprises:
an active memory for storing the second data file;
a plurality of backup memories having at least a first and a second backup memory, the first backup memory storing the second data file; and control means for controlling the active memory and the backup memories such that the first data file received from the second device is stored onto the second backup memory and the first data file stored in the second backup memory is copied onto the active memory.
5. The system according to claim 4, wherein, when the first data file does not perform properly, the control means controls the active memory and the plurality of backup memories such that the second data file stored in the first backup memory is copied onto the active memory.
6. The system according to claim 1, wherein the second device further comprises first transfer means for sequentially transferring data from the first data file to the network while stoning data of the first data file onto the second memory.
7. The system according to claim 6, wherein: the network is a tandem network; and each node further comprising second transfer means for sequentially transferring the data of the first data file received from the second device to a following node.
8. The system according to claim 6, wherein the network is a bus network.
9. In a system comprising a transfer device and a network connected to the transfer device, the network comprising a plurality of nodes each comprising a plurality of memories, one of the plurality of memories stoning a first data file, a data transfer method for transferring a second data file to each node, comprising the steps of:
sequentially transferring data of the second data file to the transfer device;
sequentially transferring the data of the second data file from the transfer device to the network, while storing the data of the second data file in the transfer device;
storing the data of the second data file received from the transfer device onto another memory of each node.
10. The method according to claim 9, further comprising the step of causing the memory storing the second data-file to be active and the memory storing the first data file to be non-active.
11. The method according to claim 10, further comprising the step of causing the memory storing the second data file to be non-active and the memory storing the first data file to be active, when the second data file does not perform properly.
12. The method according to claim 9, wherein each node comprises:
an active memory for storing the first data file; and a plurality of backup memories having at least a first and a second backup memory, the first backup memory storing the first data file.
13. The method according to claim 12, further comprising the step of controlling the active memory and the plurality of backup memories such that the second data file received from the transfer device is stored onto a second backup memory and the second data file stored in the second backup memory is copied onto the active memory.
14. The method according to claim 9, wherein the network is a tandem network.
15. The method according to claim 14, further comprising the step of sequentially transferring the data of the second data file received from the transfer device to a following node.
16. The method according to claim 14, wherein the network is a bus network.
17. A data updating system comprising:
a first device comprising a first memory for storing a first data file;
a second device comprising a second memory for storing the first data file received from the first device; and a network which is connected to the second device and receives the first data file from the second device, the network comprising a plurality of nodes in a predetermined configuration, each node comprising:
a plurality of memories each having a capacity which is not smaller than an amount of the first data file, one of the memories storing a current data file; and control means for controlling the plurality of memories such that another of the memories stores the first data file received from the second device to use the first data file as an active data file.
18. The data updating system according to claim 17, wherein the control means controls the plurality of memories such that the memory storing the data file is caused to be active and the memory storing the current data file is caused to be non-active.
19. The data updating system according to claim 17, wherein each node comprises:
an active memory for storing a current data file;
a plurality of backup memories, a first backup memory storing the current data file; and control means for controlling the active memory and the plurality of backup memories such that the data file received from the second device is stored onto a second backup memory and the data file stored in the second backup memory is copied onto the active memory.
20. The data updating system according to claim 17, wherein the second device further comprises first transfer means for sequentially transferring data of the data file to the network while storing the data onto the second memory.
21. The data updating system according to claim 20, wherein:
the network is a tandem network; and each node further comprising second transfer means for sequentially transferring the data of the data file received from the second device to a following node.
22. The data updating system according to claim 20, wherein the network is a bus network.
23. In a system comprising a transfer device and a network connected to the transfer device, the network comprising a plurality of nodes each comprising a plurality of memories, one of the plurality of memories storing a first firmware file, a firmware download method for downloading a second firmware file to each node, comprising the steps of sequentially transferring data of the second firmware file to the transfer device;
sequentially transferring the data of the second firmware file from the transfer device to the network, while storing the data of the second firmware file in the transfer device;
storing the data of the second firmware file received from the transfer device onto another memory of each node.
24. The firmware download method according to claim 23, further comprising the step of causing the memory storing the second firmware file to be active and the memory storing the first firmware file to be non-active
25. The firmware download method according to claim 23, further comprising the step of causing the memory storing the second firmware file to be nonactive and the memory storing the first firmware file to be active, when the second firmware file does not perform properly.
26. The firmware download method according to claim 23, wherein each node comprises:
an active memory for storing the first firmware file; and a plurality of backup memories, a first backup memory storing the first firmware file.
27. The firmware download method according to claim 26, further comprising the step of controlling the active memory and the backup memories such that the second firmware file received from the transfer device is stored onto a second backup memory and the second firmware file stored in the second backup memory is copied onto the active memory.
28. The firmware download method according to claim 23, wherein the network is a tandem network.
29. The firmware download method according to claim 28, further comprising the step of sequentially transferring the data of the second firmware file received from the transfer device to a following node.
30. The firmware download method according to claim 23, wherein the network is a bus network.
CA002151796A 1994-06-15 1995-06-14 Method and system for downloading data to network nodes Expired - Fee Related CA2151796C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP6156808A JPH086796A (en) 1994-06-15 1994-06-15 Down-loading method, network system therefor and data file updating method
JP156808/1994 1994-06-15

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CA2151796C true CA2151796C (en) 1999-02-23

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EP (1) EP0687975B1 (en)
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US5689640A (en) 1997-11-18
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